Datasheet Linear Technology LTM9011-14 — 数据表
制造商 | Linear Technology |
系列 | LTM9011-14 |
14位125Msps低功耗八通道ADC
数据表
LTM9011-14/LTM9010-14/LTM9009-14 - 14-Bit, 125Msps/105Msps/ 80Msps Low Power Octal ADCs
PDF, 1.8 Mb, 修订版: C, 文件上传: Aug 21, 2017
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价格
打包
LTM9011CY-14#PBF | LTM9011IY-14#PBF | |
---|---|---|
N | 1 | 2 |
Package | 11.25mm x 9mm x 2.72mm BGA 包装外形图 | 11.25mm x 9mm x 2.72mm BGA 包装外形图 |
Package Code | BGA | BGA |
Package Index | 05-08-1849 | 05-08-1849 |
Pin Count | 140 | 140 |
参数化
Parameters / Models | LTM9011CY-14#PBF | LTM9011IY-14#PBF |
---|---|---|
ADC INL, LSB | 1.2 | 1.2 |
ADCs | 8 | 8 |
Architecture | Pipeline | Pipeline |
Bits, bits | 14 | 14 |
Number of Channels | 8 | 8 |
DNL, LSB | 0.3 | 0.3 |
Demo Boards | DC1751A-A,DC1884A-A | DC1751A-A,DC1884A-A |
Design Tools | LinearLabTools | LinearLabTools |
Export Control | no | no |
Features | Simultaneous Sampling, High IF Sampling, Data Output Randomizer, Clock Duty Cycle Stabilizer | Simultaneous Sampling, High IF Sampling, Data Output Randomizer, Clock Duty Cycle Stabilizer |
I/O | Serial LVDS | Serial LVDS |
Input Drive | Differential, Single-Ended | Differential, Single-Ended |
Input Span | 1Vpp to 2Vpp | 1Vpp to 2Vpp |
Internal Reference | yes | yes |
Latency | 6 | 6 |
Operating Temperature Range, °C | 0 to 70 | -40 to 85 |
Power, mW | 1145 | 1145 |
SFDR, dB | 88 | 88 |
SINAD, dB | 73 | 73 |
SNR, dB | 73.1 | 73.1 |
Simultaneous | yes | yes |
Speed, ksps | 125000 | 125000 |
Supply Voltage Range | 1.8V | 1.8V |
生态计划
LTM9011CY-14#PBF | LTM9011IY-14#PBF | |
---|---|---|
RoHS | Compliant | Compliant |
其他选择
应用须知
- Altera Stratix IV FPGA Interface for LTM9011 ADC with LVDS Outputs &mdash AN147PDF, 623 Kb, 档案已发布: Sep 10, 2014从文件中提取
模型线
系列: LTM9011-14 (2)
制造商分类
- Data Conversion > Analog-to-Digital Converters (ADC) > High Speed ADCs (Fs >=10Msps)
- Data Conversion > Signal Chain µModule Receivers