Datasheet Texas Instruments TPS62300 — 数据表
制造商 | Texas Instruments |
系列 | TPS62300 |
QFN可调,500mA,3MHz降压转换器
数据表
500mA, 3MHz Synchronous Step-Down Converter in Chip Scale Packaging datasheet
PDF, 1.8 Mb, 修订版: E, 档案已发布: Nov 12, 2007
从文件中提取
价格
状态
TPS62300DRCR | TPS62300DRCRG4 | |
---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes | Yes |
打包
TPS62300DRCR | TPS62300DRCRG4 | |
---|---|---|
N | 1 | 2 |
Pin | 10 | 10 |
Package Type | DRC | DRC |
Industry STD Term | VSON | VSON |
JEDEC Code | S-PDSO-N | S-PDSO-N |
Package QTY | 3000 | 3000 |
Carrier | LARGE T&R | LARGE T&R |
Device Marking | AMN | AMN |
Width (mm) | 3 | 3 |
Length (mm) | 3 | 3 |
Thickness (mm) | .9 | .9 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1 | 1 |
Mechanical Data | 下载 | 下载 |
参数化
Parameters / Models | TPS62300DRCR | TPS62300DRCRG4 |
---|---|---|
Control Mode | Voltage Mode | Voltage Mode |
Duty Cycle(Max), % | 100 | 100 |
Iout(Max), A | 0.5 | 0.5 |
Iq(Typ), mA | 0.086 | 0.086 |
Operating Temperature Range, C | -40 to 85 | -40 to 85 |
Package Group | VSON | VSON |
Rating | Catalog | Catalog |
Regulated Outputs | 1 | 1 |
Special Features | Enable,Frequency Synchronization,Light Load Efficiency,Synchronous Rectification | Enable,Frequency Synchronization,Light Load Efficiency,Synchronous Rectification |
Switching Frequency(Max), kHz | 3350 | 3350 |
Switching Frequency(Min), kHz | 2650 | 2650 |
Type | Converter | Converter |
Vin(Max), V | 6 | 6 |
Vin(Min), V | 2.7 | 2.7 |
Vout(Max), V | 5.4 | 5.4 |
Vout(Min), V | 0.6 | 0.6 |
生态计划
TPS62300DRCR | TPS62300DRCRG4 | |
---|---|---|
RoHS | Compliant | Compliant |
应用须知
- Stellaris Tiny DCDC Converter Reference DesignPDF, 458 Kb, 档案已发布: Oct 7, 2009
- Small Dynamic Voltage Management Solution Based On TPS62300 High Frequency BuckPDF, 261 Kb, 档案已发布: Aug 18, 2004
As cellular phones and other portable electronics become more complex, more power is consumed by both active and standby systems. Consequently, power management design for portable devices offers new challenges in core voltage, energy management, and battery lifetime.Hardware designers already have started to use advanced and highly integrated power management devices featuring core voltage sc - Optimizing Transient Response of Internally Compensated DC-DC Converters (Rev. A)PDF, 1.1 Mb, 修订版: A, 档案已发布: May 11, 2015
- Five steps to a great PCB layout for a step-down converterPDF, 162 Kb, 档案已发布: Jan 29, 2015
- Understanding the Absolute Maximum Ratings of the SW Node (Rev. A)PDF, 755 Kb, 修订版: A, 档案已发布: Jan 13, 2012
- Testing tips for applying external power to supply outputs without an input voltPDF, 110 Kb, 档案已发布: Oct 24, 2016
- Basic Calculation of a Buck Converter's Power Stage (Rev. B)PDF, 202 Kb, 修订版: B, 档案已发布: Aug 17, 2015
- Extending the Soft Start Time Without a Soft Start Pin (Rev. B)PDF, 387 Kb, 修订版: B, 档案已发布: Jun 15, 2017
- QFN and SON PCB Attachment (Rev. B)PDF, 821 Kb, 修订版: B, 档案已发布: Aug 24, 2018
- IQ: What it is what it isn’t and how to use itPDF, 198 Kb, 档案已发布: Jun 17, 2011
- Performing Accurate PFM Mode Efficiency Measurements (Rev. A)PDF, 418 Kb, 修订版: A, 档案已发布: Dec 11, 2018
When performing measurements on DC-DC converters using pulse frequency modulation(PFM)or any power save mode proper care must be taken to ensure that the measurements are accurate. An accurate PFM mode efficiency measurement is critical for systems which require high efficiency at low loads such as in smart home systems tablets wearables and metering. - Tiny DCDC Converter Reference Design (Rev. A)PDF, 458 Kb, 修订版: A, 档案已发布: Jun 14, 2010
This reference design is presented to help application designers and others who are trying to use the MSP430 in a system with an input voltage in the range of 3.6 V to 6 V with the primary design objective to minimize solution size as well as to maintain high efficiency and long battery life.
模型线
系列: TPS62300 (2)
制造商分类
- Semiconductors> Power Management> Non-isolated DC/DC Switching Regulator> Step-Down (Buck)> Buck Converter (Integrated Switch)