Datasheet Linear Technology LTC3718 — 数据表
制造商 | Linear Technology |
系列 | LTC3718 |
低输入电压,DC / DC控制器,用于DDR / QDR存储器终端
数据表
LTC3718 - Low Input Voltage, DC/DC Controller for DDR/QDR Memory Termination
PDF, 254 Kb, 修订版: A, 文件上传: Sep 22, 2017
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LTC3718EG#PBF | LTC3718EG#TRPBF | |
---|---|---|
N | 1 | 2 |
Package | SSOP-24 包装外形图 | SSOP-24 包装外形图 |
Package Code | G | G |
Package Index | 05-08-1640 (G24) | 05-08-1640 (G24) |
Pin Count | 24 | 24 |
参数化
Parameters / Models | LTC3718EG#PBF | LTC3718EG#TRPBF |
---|---|---|
Demo Boards | DC464A | DC464A |
Design Tools | LTspice Model | LTspice Model |
Export Control | no | no |
Features | DDR Mode, Resistor Set Frequency, Power Good | DDR Mode, Resistor Set Frequency, Power Good |
Frequency, kHz | 1500 | 1500 |
Integrated Inductor | no | no |
Ishutdown, µA | 15 | 15 |
Isupply, mA | 1 | 1 |
Monolithic | no | no |
Number of Outputs | 1 | 1 |
Operating Temperature Range, °C | 0 to 85 | 0 to 85 |
Output Current, A | 20 | 20 |
Polyphase | no | no |
Switch Current, A | 20 | 20 |
Synchronous | yes | yes |
Topology | Buck | Buck |
Vin Max, V | 36 | 36 |
Vin Min, V | 1.5 | 1.5 |
Vout Max, V | 36 | 36 |
Vout Maximum | VREF/2 | VREF/2 |
Vout Min, V | 0.7 | 0.7 |
生态计划
LTC3718EG#PBF | LTC3718EG#TRPBF | |
---|---|---|
RoHS | Compliant | Compliant |
设计须知
- Wide Input Range, High Efficiency DDR Termination Power Supply Achieves Fast Transient Response &mdash DN281PDF, 84 Kb, 档案已发布: Apr 1, 2002从文件中提取
文章
- High Efficiency DDR Termination Power Supplies Source and Sink More than 10 Amps &mdash LT JournalPDF, 205 Kb, 档案已发布: Mar 1, 2002从文件中提取
模型线
系列: LTC3718 (2)
制造商分类
- Power Management > Switching Regulator > DDR Memory/Bus Termination