Datasheet Linear Technology LTC3831 — 数据表

制造商Linear Technology
系列LTC3831

大功率同步开关稳压器控制器,用于DDR存储器终端

数据表

LTC3831 - High Power Synchronous Switching Regulator Controller for DDR Memory Termination
PDF, 219 Kb, 修订版: B, 文件上传: Sep 23, 2017
从文件中提取

价格

打包

LTC3831EGN#PBFLTC3831EGN#TRPBFLTC3831IGN#PBFLTC3831IGN#TRPBF
N1234
PackageSSOP-16
包装外形图
SSOP-16
包装外形图
SSOP-16
包装外形图
SSOP-16
包装外形图
Package CodeGNGNGNGN
Package Index05-08-1641 (GN16)05-08-1641 (GN16)05-08-1641 (GN16)05-08-1641 (GN16)
Pin Count16161616

参数化

Parameters / ModelsLTC3831EGN#PBFLTC3831EGN#TRPBFLTC3831IGN#PBFLTC3831IGN#TRPBF
ArchitectureConstant Frequency Voltage ModeConstant Frequency Voltage ModeConstant Frequency Voltage ModeConstant Frequency Voltage Mode
Demo BoardsDC470ADC470ADC470ADC470A
Design ToolsLTspice ModelLTspice ModelLTspice ModelLTspice Model
Export Controlnononono
FeaturesNo Rsense, DDR Mode, Resistor Set Frequency, External SynchronizationNo Rsense, DDR Mode, Resistor Set Frequency, External SynchronizationNo Rsense, DDR Mode, Resistor Set Frequency, External SynchronizationNo Rsense, DDR Mode, Resistor Set Frequency, External Synchronization
Frequency, kHz500500500500
Frequency Adjust Range100kHz - 500kHz100kHz - 500kHz100kHz - 500kHz100kHz - 500kHz
Frequency Sync Range100kHz - 500kHz100kHz - 500kHz100kHz - 500kHz100kHz - 500kHz
Integrated Inductornononono
Ishutdown, µA1111
Isupply, mA0.70.70.70.7
Monolithicnononono
Number of Outputs1111
Operating Temperature Range, °C0 to 850 to 85-40 to 85-40 to 85
Output Current, A20202020
Polyphasenononono
Sense ResistorNoneNoneNoneNone
Switch Current, A20202020
Synchronousyesyesyesyes
TopologyBuckBuckBuckBuck
Vin Max, V8888
Vin Min, V3333
Vout Max, V8888
Vout MaximumVIN/2VIN/2VIN/2VIN/2
Vout Min, V1.251.251.251.25

生态计划

LTC3831EGN#PBFLTC3831EGN#TRPBFLTC3831IGN#PBFLTC3831IGN#TRPBF
RoHSCompliantCompliantCompliantCompliant

文章

  • High Efficiency DDR Termination Power Supplies Source and Sink More than 10 Amps &mdash LT Journal
    PDF, 205 Kb, 档案已发布: Mar 1, 2002
    从文件中提取

模型线

制造商分类

  • Power Management > Switching Regulator > DDR Memory/Bus Termination