Datasheet Analog Devices AD7175-2 — 数据表

24-Bit, 250 kSPS, Sigma-Delta ADC with
20 µs Settling and True Rail-to-Rail Buffers
AD7175-2 Data Sheet
FEATURES GENERAL DESCRIPTION Fast and flexible output rate: 5 SPS to 250 kSPS
Channel scan data rate of 50 kSPS/channel (20 µs settling)
Performance specifications
17.2 noise free bits at 250 kSPS
20 noise free bits at 2.5 kSPS
24 noise free bits at 20 SPS
INL: ±1 ppm of FSR
85 dB rejection of 50 Hz and 60 Hz with 50 ms settling
User configurable input channels
2 fully differential channels or 4 single-ended channels
Crosspoint multiplexer
On-chip 2.5 V reference (±2 ppm/°C drift)
True rail-to-rail analog and reference input buffers
Internal or external clock
Power supply: AVDD1 = 5 V, AVDD2 = IOVDD = 2 V to 5 V
Split supply with AVDD1/AVSS at ±2.5 V
ADC current: 8.4 mA
Temperature range: −40°C to +105°C
3-or 4-wire serial digital interface (Schmitt trigger on SCLK)
Serial port interface (SPI), QSPI, MICROWIRE, and DSP …