Datasheet Analog Devices AD5689BRUZ — 数据表

Dual, 16-/12-Bit nanoDAC+
with SPI Interface
AD5689/AD5687 Data Sheet
FEATURES FUNCTIONAL BLOCK DIAGRAM
VDD VLOGIC GND VREF AD5689/AD5687 SCLK SYNC SDIN INTERFACE LOGIC INPUT
REGISTER DAC
REGISTER STRING
DAC A VOUTA
BUFFER INPUT
REGISTER DAC
REGISTER STRING
DAC B VOUTB
BUFFER SDO LDAC RESET POWER-ON
RESET GAIN =
Г—1/Г—2 RSTSEL GAIN POWERDOWN
LOGIC 11255-001 High relative accuracy (INL): В±2 LSB maximum at 16 bits
Tiny package: 3 mm Г— 3 mm, 16-lead LFCSP
TUE: В±0.1% of FSR maximum
Offset error: В±1.5 mV maximum
Gain error: В±0.1% of FSR maximum
High drive capability: 20 mA, 0.5 V from supply rails
User-selectable gain of 1 or 2 (GAIN pin)
Reset to zero scale or midscale (RSTSEL pin) …