Datasheet Analog Devices ADL5205 — 数据表

FEATURES FUNCTIONAL BLOCK DIAGRAM Dual, independent, digitally controlled gain amplifier (DGA)
−9 dB to +26 dB gain range
1 dB step size, ±0.2 dB accuracy at 200 MHz
100 Ω differential input resistance
10 Ω differential output resistance
1.2 dB change in noise figure for first 12 dB of gain reduction
Output third-order intercept (OIP3): 48.5 dBm at 200 MHz, 5 V,
high performance mode
−3 dB bandwidth: 1700 MHz typical in high performance
mode
Multiple control interface options
Parallel 6-bit control interface with latch
Serial peripheral interface (SPI) with fast attack
Gain step up/down interface
Wide input dynamic range
Low power mode
Power-down control
Single 3.3 V or 5 V supply operation
40-lead, 6 mm × 6 mm LFCSP package SIDE A
SPI WITH FA,
PARALLEL WITH LATCH,
UP/DOWN
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