Datasheet Microchip ATMEGA324PA-MCHR — 数据表

8-bit AVR Microcontroller ATmega324PA
DATASHEET COMPLETE Introduction
В® В® The Atmel picoPower ATmega324PA is a low-power CMOS 8-bit
microcontroller based on the AVRВ® enhanced RISC architecture. By
executing powerful instructions in a single clock cycle, the ATmega324PA
achieves throughputs close to 1MIPS per MHz. This empowers system
designer to optimize the device for power consumption versus processing
speed. Feature
High Performance, Low Power AtmelВ®AVRВ® 8-Bit Microcontroller Family Advanced RISC Architecture
– 131 Powerful Instructions
– Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20MHz
– On-chip 2-cycle Multiplier High Endurance Non-volatile Memory Segments
– 32KBytes of In-System Self-Programmable Flash Program
Memory
– 1KBytes EEPROM
– 2KBytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data Retention: 20 Years at 85°C/100 Years at 25°C(1)
– Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation
– Programming Lock for Software Security Atmel QTouchВ® Library Support …

8-bit AVR Microcontrollers ATmega324PA
DATASHEET SUMMARY Introduction
В® В® The Atmel picoPower ATmega324PA is a low-power CMOS 8-bit
microcontroller based on the AVRВ® enhanced RISC architecture. By
executing powerful instructions in a single clock cycle, the ATmega324PA
achieves throughputs close to 1MIPS per MHz. This empowers system
designer to optimize the device for power consumption versus processing
speed. Feature
High Performance, Low Power AtmelВ®AVRВ® 8-Bit Microcontroller Family Advanced RISC Architecture
– 131 Powerful Instructions
– Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20MHz
– On-chip 2-cycle Multiplier High Endurance Non-volatile Memory Segments
– 32KBytes of In-System Self-Programmable Flash Program
Memory
– 1KBytes EEPROM
– 2KBytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data Retention: 20 Years at 85°C/100 Years at 25°C(1)
– Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation
– Programming Lock for Software Security Atmel QTouchВ® Library Support …