Datasheet Microchip ATMEGA48A-MUR — 数据表

ATmega48A/88A/168A
AVRВ® Microcontroller
Introduction
В® The ATmega48A/88A/168A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced
RISC architecture. By executing powerful instructions in a single-clock cycle, the ATmega48A/88A/168A
В®
achieves throughputs close to 1 MIPS per MHz. This empowers system designers to optimize the device
for power consumption versus processing speed. Feature
В® High Performance, Low-Power AVR 8-Bit Microcontroller Family
Advanced RISC Architecture – 131 Powerful instructions
– Most single clock cycle execution
– 32 x 8 General purpose working registers
– Fully static operation
– Up to 20 MIPS throughput at 20 MHz
– On-chip 2-cycle multiplier High Endurance Nonvolatile Memory Segments
– 4K/8K/16K Bytes of in-system self-programmable Flash program memory
– 256/512/512 Bytes EEPROM
– 512/1K/1K Bytes internal SRAM
– Write/erase cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C(1)
– Optional boot code section with independent lock bits In-system programming by on-chip boot program True read-while-write operation
– Programming lock for software security QTouch Library Support
– Capacitive touch buttons, sliders and wheels …

8-bit AVR Microcontrollers ATmega48A/88A/168A
DATASHEET SUMMARY Introduction
В® The Atmel ATmega48A/88A/168A is a low-power CMOS 8-bit
microcontroller based on the AVRВ® enhanced RISC architecture. By
executing powerful instructions in a single clock cycle, the ATmega48A/88A/
168A achieves throughputs close to 1MIPS per MHz. This empowers system
designer to optimize the device for power consumption versus processing
speed. Feature
High Performance, Low Power AtmelВ®AVRВ® 8-Bit Microcontroller Family Advanced RISC Architecture
– 131 Powerful Instructions
– Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20MHz
– On-chip 2-cycle Multiplier High Endurance Non-volatile Memory Segments
– 4K/8K/16KBytes of In-System Self-Programmable Flash program
Memory
– 256/512/512Bytes EEPROM
– 512/1K/1KBytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data Retention: 20 years at 85°C/100 years at 25°C(1)
– Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation
– Programming Lock for Software Security AtmelВ® QTouchВ® Library Support …