Datasheet Microchip DSPIC33FJ64MC204-I/PT — 数据表

dsPIC33FJ32MC302/304,
dsPIC33FJ64MCX02/X04 and
dsPIC33FJ128MCX02/X04
16-bit Digital Signal Controllers (up to 128 KB Flash and 16K
SRAM) with Motor Control PWM and Advanced Analog
Operating Conditions System Peripherals 3.0V to 3.6V, -40ВєC to +150ВєC, DC to 20 MIPS 3.0V to 3.6V, -40ВєC to +125ВєC, DC to 40 MIPS Clock Management 2% internal oscillator
Programmable PLL and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Low-power management modes
Fast wake-up and start-up Core Performance Up to 40 MIPS 16-bit dsPIC33F CPU
Two 40 bit wide accumulators
Single-cycle (MAC/MPY) with dual data fetch
Single-cycle MUL plus hardware divide Motor Control PWM Up to four PWM generators with eight outputs
Dead Time for rising and falling edges
25 ns PWM resolution
PWM support for Motor Control: BLDC, PMSM, ACIM,
and SRM Programmable Fault inputs Flexible trigger for ADC conversions and configurations Cyclic Redundancy Check (CRC) module
16-bit dual channel 100 ksps Audio DAC
Up to five 16-bit and up to two 32-bit Timers/Counters
Up to four Input Capture (IC) modules
Up to four Output Compare (OC) modules
Up to two Quadrature Encoder Interface (QEI) modules …