Supertex inc. TP2522 P-Channel Enhancement-Mode
Vertical DMOS FET
Features General Description в–єв–є Low threshold (-2.4V max.)
в–єв–є High input impedance
в–єв–є Low input capacitance (125pF max.)
в–єв–є Fast switching speeds
в–єв–є Low on-resistance
в–єв–є Free from secondary breakdown
в–єв–є Low input and output leakage This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown. Applications
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