Datasheet Intersil X9400YV24I-2.7 — 数据表

DATASHEET
X9400 FN8189
Rev 4.00
September 2, 2015 Low Noise/Low Power/SPI Bus Quad Digitally Controlled Potentiometers
(XDCPв„ў)
FEATURES DESCRIPTION Four potentiometers per package 64 resistor taps SPI serial interface for write, read, and transfer
operations of the potentiometer Wiper resistance, 40пЃ— typical at 5V. Four non-volatile data registers for each
potentiometer Non-volatile storage of multiple wiper position Power-on recall. Loads saved wiper position on
power-up. Standby current < 1µA max System VCC: 2.7V to 5.5V operation Analog V+/V–: -5V to +5V 10k, 2.5k end to end resistance 100 yr. data retention Endurance: 100,000 data changes per bit per
register Low power CMOS 24 Ld SOIC and 24 Ld TSSOP Pb-free plus anneal available (RoHS compliant) The X9400 integrates four digitally controlled
potentiometers (XDCPs) on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the SPI
serial bus interface. Each potentiometer has
associated with it a volatile Wiper Counter Register
(WCR) and four nonvolatile Data Registers (DR0-3)
that can be directly written to and read by the user.
The contents of the WCR controls the position of the
wiper on the resistor array through the switches. …