NOT RECOMMENDED FOR NEW DESIGNS
Micrel, Inc. DIFFERENTIAL
ECL-to-TTL TRANSLATOR FEATURES
в–
в–
в–
в–
в– SY100ELT25 SY100ELT25 DESCRIPTION 2.6ns typical propagation delay
Differential ECL inputs
24mA TTL outputs
Flow-through pinouts
Available in 8-pin SOIC package The SY100ELT25 is a differential ECL-to-TTL
translator. Because ECL levels are used, a +5V, –5.2V
(or –4.5V) and ground are required. The small outline 8lead SOIC package and the single gate of the ELT25
makes it ideal for those applications where performance,
space and low power are at a premium.
The VBB output allows the ELT25 to also be used in a
single-ended input mode. In this mode the VBB output is
tied to the D input for a non-inverting buffer or the D
input for an inverting buffer. If used the VBB pin should
be bypassed to ground via a 0.01ВµF capacitor. PIN NAMES
Pin M9999-031506
hbwhelp@micrel.com or (408) 955-1690 Function Q TTL Output D Differential ECL Inputs VCC Positive Supply VEE Negative Supply VBB Reference Output GND Ground Rev.: C 1 Amendment: /0 Issue Date: March 2006 Micrel, Inc. SY100ELT25 PACKAGE/ORDERING INFORMATION Ordering Information(1) …