8-BIT SHIFT
REGISTER Micrel, Inc. FEATURES
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в– SY100S341 SY100S341 DESCRIPTION
The SY100S341 offer eight D-type, edge-triggered flipflops with both individual inputs for parallel operation as
well as serial inputs for bidirectional shifting, and are
designed for use in high-performance ECL systems. Data
is clocked into the flip-flops on the rising edge of the clock.
The mode of operation is selected by two Select inputs
(S0, S1) which determine if the device performs a shift, hold
or parallel entry function, as described in the Truth Table.
The inputs on these devices have 75kΩ pull-down resistors. Max. shift frequency of 600MHz
Max. Clock to Q delay of 1200ps
IEE min. of –150mA
Industry standard 100K ECL levels …