Datasheet Texas Instruments HPA00719RSVR — 数据表
| 制造商 | Texas Instruments |
| 系列 | SN74AVC4T245 |
| 零件号 | HPA00719RSVR |
具有可配置电压电平转换和三态输出的4位双电源总线收发器16-UQFN -40至85
数据表
SN74AVC4T245 Dual-Bit Bus Transceiver with Configurable Voltage Translation and 3-State Outputs datasheet
PDF, 1.5 Mb, 修订版: G, 档案已发布: Nov 5, 2014
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 16 |
| Package Type | RSV |
| Industry STD Term | UQFN |
| JEDEC Code | R-PQFP-N |
| Package QTY | 3000 |
| Carrier | LARGE T&R |
| Device Marking | ZWU |
| Width (mm) | 1.8 |
| Length (mm) | 2.6 |
| Thickness (mm) | .5 |
| Pitch (mm) | .4 |
| Max Height (mm) | .55 |
| Mechanical Data | 下载 |
参数化
| Bits | 4 |
| F @ Nom Voltage(Max) | 100 Mhz |
| ICC @ Nom Voltage(Max) | 0.016 mA |
| Operating Temperature Range | -40 to 85 C |
| Package Group | UQFN |
| Package Size: mm2:W x L | 16UQFN: 5 mm2: 1.8 x 2.6(UQFN) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | AVC |
| VCC(Max) | 3.6 V |
| VCC(Min) | 1.2 V |
| Voltage(Nom) | 1.2,1.5,1.8,2.5,3.3 V |
| tpd @ Nom Voltage(Max) | 3.4,3.2,2.9,2.8 ns |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: ADS7056EVM-PDK
ADS7056 Ultra-Low-Power Ultra-Small-Size 14-Bit 2.5MSPS SAR ADC Performance Demonstration Kit (PDK)
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: LAUNCHXL-CC1350-4
CC1350 Dualband Launchpad for 433MHz/2.4GHz Applications
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: MSP-EXP432P401R
SimpleLinkВ™ MSP432P401R LaunchPadВ™ Development Kit
Lifecycle Status: Active (Recommended for new designs) - Daughter Cards: AUDK2G
66AK2Gx (K2G) Audio Daughter Card
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TMDSCSK8127
TMS320DM8127 Camera Starter Kit (CSK)
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: AVCLVCDIRCNTRL-EVM
Generic EVM for Direction-Controlled Bidirectional Translation Device Supporting AVC and LVC
Lifecycle Status: Active (Recommended for new designs) - Development Kits: DLPLIGHTCRAFTER
DLPВ® LightCrafterВ™ Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TMDSCSK388
DM38x Camera Starter Kit (CSK)
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: EVMX777BG-01-00-00
J6Entry, RSP and TDA2E-17 CPU Board Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: EVMK2G
66AK2Gx (K2G) Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: EVMX777G-01-20-00
J6Entry/RSP Infotainment (CPU+Display+JAMR3) Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)PDF, 126 Kb, 修订版: B, 档案已发布: Jul 7, 1999
Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i - AVC Logic Family Technology and Applications (Rev. A)PDF, 148 Kb, 修订版: A, 档案已发布: Aug 26, 1998
Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control ( - Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)PDF, 390 Kb, 修订版: B, 档案已发布: Apr 30, 2015
- 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
模型线
系列: SN74AVC4T245 (24)
- 74AVC4T245DGVRE4 74AVC4T245DGVRG4 74AVC4T245RGYRG4 74AVC4T245RSVRG4 HPA00719RSVR SN74AVC4T245D SN74AVC4T245DBR SN74AVC4T245DG4 SN74AVC4T245DGVR SN74AVC4T245DR SN74AVC4T245DRE4 SN74AVC4T245DRG4 SN74AVC4T245DT SN74AVC4T245PW SN74AVC4T245PWE4 SN74AVC4T245PWG4 SN74AVC4T245PWR SN74AVC4T245PWRE4 SN74AVC4T245PWRG4 SN74AVC4T245PWT SN74AVC4T245PWTE4 SN74AVC4T245PWTG4 SN74AVC4T245RGYR SN74AVC4T245RSVR
制造商分类
- Semiconductors > Logic > Voltage Level Translation > Direction Controlled Voltage Translation