Datasheet Texas Instruments TNETV2665ZWT4 — 数据表

制造商Texas Instruments
系列TMS320C6424
零件号TNETV2665ZWT4

定点数字信号处理器361-NFBGA 0至90

数据表

TMS320C6424 Fixed-Point Digital Signal Processor datasheet
PDF, 1.6 Mb, 修订版: D, 档案已发布: Jan 11, 2010
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

打包

Pin361361361361
Package TypeZWTZWTZWTZWT
Industry STD TermNFBGANFBGANFBGANFBGA
JEDEC CodeS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-N
Package QTY90909090
Device MarkingTMS3204C6424ZWTL2
Width (mm)16161616
Length (mm)16161616
Thickness (mm).9.9.9.9
Pitch (mm).8.8.8.8
Max Height (mm)1.41.41.41.4
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参数化

DSP1 C64x+
RatingCatalog

生态计划

RoHSCompliant
Pb FreeYes

设计套件和评估模块

  • JTAG Emulators/ Analyzers: TMDSEMU200-U
    XDS200 USB Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
    XDS560v2 System Trace USB & Ethernet Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
    XDS560v2 System Trace USB Debug Probe
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Implementing DDR2 PCB Layout on the TMS320C6424 DSP
    PDF, 147 Kb, 档案已发布: Oct 16, 2008
    This application report contains implementation instructions for the DDR2 interface contained on the TMS320C6424 digital signal processor (DSP) device. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices.The previous approach specified device timing in terms of data sheet specifications and simulation models. The system designer was r
  • TMS320C642x Power Consumption Summary (Rev. D)
    PDF, 141 Kb, 修订版: D, 档案已发布: Feb 17, 2012
  • TMS320C642x Pin Multiplexing Utility
    PDF, 1.3 Mb, 档案已发布: Jul 9, 2007
    The C642x devices use a great deal of internal pin multiplexing to allow the most functionality in the smallest and lowest cost package. The software accompanying this application report allows the pin multiplexing registers of the device to be calculated with ease, as well as showing what peripherals can be used together and what devices of the C642x family support the peripherals that are select
  • Using the TMS320C642x Bootloader (Rev. B)
    PDF, 256 Kb, 修订版: B, 档案已发布: Mar 23, 2012
    This document describes the functionality of the C642x ROM bootloader software. Please note that the ROM bootloader requires use of Application Image Script (AIS) as the primary data format for loading code/data. AIS is a Texas Instruments, Inc. proprietary data format. AIS is explained in detail in Section 2 of this document.
  • Using DMA with Framework Components for C64x+ (Rev. A)
    PDF, 859 Kb, 修订版: A, 档案已发布: Oct 29, 2007
    This application note describes the standard DMA software abstractions and interfaces for TMS320 DSP Algorithm Standard (xDAIS) compliant algorithms designed for the C64x+ EDMA3 controller using DMA Framework Components utilities. The DMA Framework Component utilities described in this document include a standard DMA resource specification and negotiation protocol (IDMA3), a DMA Resource Manager (
  • 5Vin C642x Power using a PMIC (Multi-output DC/DC Converter)
    PDF, 302 Kb, 档案已发布: Oct 9, 2008
  • TMS320C620x/C642x McBSP: UART (Rev. C)
    PDF, 293 Kb, 修订版: C, 档案已发布: Sep 9, 2008
    This document describes how to use the multichannel buffered serial port (McBSP) in the Texas Instruments (TI) TMS320C6000в„ў (C6000в„ў) digital signal processors (DSP) to interface to a universal asynchronous receiver/transmitter (UART). Descriptions of the hardware configuration and software routines necessary for proper functionality are included.The McBSP is not capable of support
  • 5Vin C642x Power using DC/DC Controllers and LDO
    PDF, 741 Kb, 档案已发布: Oct 9, 2008
  • 5Vin C642x Power using Integrated-FET DC/DC Converters and LDO
    PDF, 550 Kb, 档案已发布: Oct 9, 2008
  • 12Vin C642x Power using Integrated-FET DC/DC Converters and LDO
    PDF, 310 Kb, 档案已发布: Oct 9, 2008
  • EDMA v2.0 to EDMA v3.0 (EDMA3) Migration Guide (Rev. A)
    PDF, 292 Kb, 修订版: A, 档案已发布: Aug 21, 2008
    This application report summarizes the key differences between the enhanced direct memory access (EDMA3) used on C64x+в„ў DSP devices and the EDMA2 used on TMS320C64xв„ў DSP devices, and provides guidance for migrating from EDMA2 to EDMA3.
  • TMS320C64x to TMS320C64x+ CPU Migration Guide (Rev. A)
    PDF, 310 Kb, 修订版: A, 档案已发布: Oct 20, 2005
    This document describes migration from the Texas Instruments TMS320C64xв„ў digital signal processor (DSP) to the TMS320C64x+в„ў DSP. The objective of this document is to indicate differences between the two cores and to briefly describe new features. Functionality in the devices that is identical is not included. For detailed information about either device, see the TMS320C64x/C64x+ DSP
  • Plastic Ball Grid Array [PBGA] Application Note (Rev. B)
    PDF, 1.6 Mb, 修订版: B, 档案已发布: Aug 13, 2015
  • Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)
    PDF, 93 Kb, 修订版: A, 档案已发布: Jul 17, 2008
    This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious. The system designer uses this information to evaluate whether timing specifications are met and can be expected to operate reliably.Ultimately, the real question the hardwa
  • Thermal Considerations for the DM64xx, DM64x, and C6000 Devices
    PDF, 127 Kb, 档案已发布: May 20, 2007
    As integrated circuit (IC) components become more complex, the challenge of producing an end product with superior thermal performance increases. Thermal performance is a system level concern, impacted by IC packaging as well as by printed circuit board (PCB) design. This application report addresses the thermal considerations for the TMS320DM64xx, TMS320DM64x, and TMS320C6000в„ў DSP devices.
  • Introduction to TMS320C6000 DSP Optimization
    PDF, 535 Kb, 档案已发布: Oct 6, 2011
    The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then

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制造商分类

  • Semiconductors > Processors > Digital Signal Processors > C6000 DSP > Other C6000 DSP