Datasheet Texas Instruments TPS54372PWPRG4 — 数据表

制造商Texas Instruments
系列TPS54372
零件号TPS54372PWPRG4
Datasheet Texas Instruments TPS54372PWPRG4

3-A有源总线终端/ DDR存储器DC / DC转换器20-HTSSOP -40至85

数据表

3-A Output Trkg/Termination Synchronous PWM Switcher w/Integrated FETs datasheet
PDF, 782 Kb, 修订版: D, 档案已发布: Feb 15, 2005
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin20
Package TypePWP
Industry STD TermHTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingTPS54372
Width (mm)4.4
Length (mm)6.5
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical Data下载

参数化

Control ModeVoltage Mode
DDR Memory TypeDDR,DDR2,DDR3
Iout VTT(Max)3 A
Iq(Typ)6.2 mA
Operating Temperature Range-40 to 85 C
OutputVTT
Package GroupHTSSOP
Package Size: mm2:W x L20HTSSOP: 42 mm2: 6.4 x 6.5(HTSSOP) PKG
RatingCatalog
Regulator TypeStep-Down Converter
Special FeaturesStatus Pin
Vin Bias(Max)6 V
Vin Bias(Min)3 V
Vin(Max)6 V
Vin(Min)3 V
Vout VTT(Min)0.2 V

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: TPS54372EVM-215
    3-A Active Bus Termination/DDR Memory DC/DC Converter
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Using the TPS54372 in DDR Memory/Active Bus Termination Applications
    PDF, 164 Kb, 档案已发布: Jul 11, 2002
    The integrated FET, SWIFTв„ў TPS54372 regulator from Texas Instruments is a simple and low-cost solution for DDR memory bus and other high-speed logic bus termination voltage, V(TT), applications. The TPS54372 can support output voltages as low as 0.2 V.
  • Limitations of Slew Rate on the REFIN Pin of the TPS54X72 Family
    PDF, 288 Kb, 档案已发布: May 23, 2005
    Tracking dc/dc converters must track a reference voltage. However, the rate of change in the reference voltage that the output voltage can successfully track is limited. This application report presents a typical application circuit and the reasons for these limitations, along with the waveforms showing circuit performance when the reference voltage slew rates are increased above the maximum.
  • Dual Output Power Supply Sequencing for High Performance Processors
    PDF, 6.0 Mb, 档案已发布: Jul 17, 2002
    Dual voltage power supply architectures are becoming commonplace in high performance microprocessor and digital signal processor (DSP) systems. To save power and increase processing speeds, processor cores have smaller geometry cells and require lower supply voltages than the system bus voltages. Power management in these systems requires special attention. Yesterday's power management ICs and app

模型线

系列: TPS54372 (4)

制造商分类

  • Semiconductors > Power Management > DDR Memory Power Solutions