Datasheet Texas Instruments TPS54872PWP — 数据表
制造商 | Texas Instruments |
系列 | TPS54872 |
零件号 | TPS54872PWP |
8A有源总线终端/ DDR存储器DC / DC转换器28-HTSSOP -40至85
数据表
8-A Output, 4-V to 6-V Input Tracking/Termination Synchronous PWM Switcher datasheet
PDF, 682 Kb, 修订版: C, 档案已发布: Feb 11, 2005
从文件中提取
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
打包
Pin | 28 |
Package Type | PWP |
Industry STD Term | HTSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 50 |
Carrier | TUBE |
Device Marking | TPS54872 |
Width (mm) | 4.4 |
Length (mm) | 9.7 |
Thickness (mm) | 1 |
Pitch (mm) | .65 |
Max Height (mm) | 1.2 |
Mechanical Data | 下载 |
参数化
Control Mode | Voltage Mode |
DDR Memory Type | DDR,DDR2,DDR3 |
Iout VTT(Max) | 8 A |
Iq(Typ) | 11 mA |
Operating Temperature Range | -40 to 85 C |
Output | VTT |
Package Group | HTSSOP |
Package Size: mm2:W x L | 28HTSSOP: 62 mm2: 6.4 x 9.7(HTSSOP) PKG |
Rating | Catalog |
Regulator Type | Step-Down Converter |
Special Features | Status Pin |
Vin Bias(Max) | 6 V |
Vin Bias(Min) | 4 V |
Vin(Max) | 6 V |
Vin(Min) | 4 V |
Vout VTT(Min) | 0.2 V |
生态计划
RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: TPS54872EVM-222
8-A Active Bus Termination/DDR Memory DC/DC Converter
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: XILINXPWR-082
XILINXPWR-082 Power Management Evaluation Module for Xilinx FPGAs
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Dual Output Power Supply Sequencing for High Performance ProcessorsPDF, 6.0 Mb, 档案已发布: Jul 17, 2002
Dual voltage power supply architectures are becoming commonplace in high performance microprocessor and digital signal processor (DSP) systems. To save power and increase processing speeds, processor cores have smaller geometry cells and require lower supply voltages than the system bus voltages. Power management in these systems requires special attention. Yesterday's power management ICs and app - Using Low Voltage SWIFT DC/DC Converters with Ceramic CapacitorsPDF, 490 Kb, 档案已发布: Jan 8, 2003
This application note investigates an adequate phase margin for stable operation of SWIFTв„ў regulators with the ceramic capacitors at worst-case tolerances of regulator and external parts. TI also shows how the bandwidth and gain of feedback loop impact on load-current transient-response characteristics. Measurements and analysis have shown that the voltage-mode control SWIFTв„ў regulat
模型线
系列: TPS54872 (4)
- TPS54872PWP TPS54872PWPG4 TPS54872PWPR TPS54872PWPRG4
制造商分类
- Semiconductors > Power Management > DDR Memory Power Solutions