Datasheet Analog Devices ADSP-BF561SBBZ500 — 数据表

Blackfin Embedded
Symmetric Multiprocessor
ADSP-BF561 FEATURES
Dual symmetric 600 MHz high performance Blackfin cores
328K bytes of on-chip memory
(see Memory Architecture on Page 4)
Each Blackfin core includes
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
40-bit shifter
RISC-like register and instruction model for ease of pro­
gramming and compiler-friendly support
Advanced debug, trace, and performance monitoring
Wide range of operating voltages, (see Operating Conditions
on Page 20)
256-ball CSP_BGA (2 sizes) and 297-ball PBGA
package options PERIPHERALS 2 internal memory-to-memory DMAs and 1 internal memory
DMA controller
12 general-purpose 32-bit timers/counters with PWM
capability
SPI-compatible port
UART with support for IrDA
Dual watchdog timers
Dual 32-bit core timers …