Datasheet Analog Devices ADCLK950 — 数据表
| 制造商 | Analog Devices |
| 系列 | ADCLK950 |
2个可选输入，10个LVPECL输出，SiGe时钟扇出缓冲器
数据表
ADCLK950: Two Selectable Inputs, 10 LVPECL Outputs, SiGe Clock Fanout Buffer Data Sheet
PDF, 351 Kb, 修订版: B, 文件上传: Dec 25, 2018
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价格
状态
| ADCLK950BCPZ | ADCLK950BCPZ-REEL7 | |
|---|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
打包
| ADCLK950BCPZ | ADCLK950BCPZ-REEL7 | |
|---|---|---|
| N | 1 | 2 |
| Package | 40 ld LFCSP (6x6mm w_2.9mm EP) | 40 ld LFCSP (6x6mm w_2.9mm EP) |
| Pins | 40 | 40 |
| Package Code | CP-40-16 | CP-40-16 |
参数化
| Parameters / Models | ADCLK950BCPZ | ADCLK950BCPZ-REEL7 |
|---|---|---|
| # Outputs | 10 | 10 |
| Clock Function | Distribution | Distribution |
| Interface | Pin Select, Serial | Pin Select, Serial |
| On-Chip VCO or DCO | No | No |
| Operating Temperature Range, °C | -40 to 85 | -40 to 85 |
| Output Frequency(max), Hz | 4.8G | 4.8G |
| Output Logic | LVPECL | LVPECL |
| Power(typ), W | 1.4 | 1.4 |
| Ref Clock(max), Hz | 4.8G | 4.8G |
| Ref Clock(min), Hz | 0M | 0M |
生态计划
| ADCLK950BCPZ | ADCLK950BCPZ-REEL7 | |
|---|---|---|
| RoHS | Compliant | Compliant |
模型线
系列: ADCLK950 (2)
制造商分类
- Clock & Timing > Clock Distribution Devices