Datasheet Analog Devices ADRF6520ACPZ — 数据表

Dual Programmable Filters and VGAs for
2 GHz Channel Spacing for µW Radios
ADRF6520 Data Sheet APPLICATIONS 25 ENBL 26 CHP1 27 COM 28 VPS 29 VPS 30 COMD 31 VPSD 32 CS FUNCTIONAL BLOCK DIAGRAM INP1 1 24 OPP1 INM1 2 23 OPM1 COM 3 22 COM ADRF6520 CFLT1 4 21 VGN1 CFLT2 5 20 VGN2
DETECTOR 19 COM VRMS 16 CHP2 15 COM 14 VPS 13 VPS 12 17 OPP2 SDIO 11 18 OPM2 INP2 8 9 INM2 7 14830-001 COM 6 RST Matched VGAs and programmable filters
Maximum gain: 53 dB
Continuous gain control range: 60 dB
Filter bypass mode I/Q bandwidth
±1 dB gain flatness: >1250 MHz
4-pole Butterworth filter I/Q bandwidth: 36 MHz to 720 MHz
RMS detector
IMD3: 55 dBc, RLOAD = 100 Ω
Gain = 53 dB Min Typ 3.5 4.5
1.5
14 Max Unit Inputs shorted, dc offset correction loop enabled
AC coupling recommended 2 V.
Analog Positive Supply Voltage: 3.15 V to 3.45 V.
DC Offset Correction Loop Capacitors. Connect the capacitors to a circuit common.
RMS Detector Output. The output transfer function is 1 V/V rms × (CH1_RMS + CH2_RMS), where CH1_RMS
is the differential rms voltage of the input of the Channel 1 filter, and CH2_RMS is the differential rms
voltage of the input of the Channel 2 filter. The user can leave the pin open if not using the rms detector;
there is no need to terminate this pin. Load this pin with at least 1 kΩ to ground; values lower than this
prevent the detector output from reaching its full-scale value.
Channel 2 Differential Outputs. These outputs have a 20 Ω differential output impedance. …