Datasheet Analog Devices AD9218SSTZ-105EPRL — 数据表

10-Bit, 40/65/80/105 MSPS
3 V Dual Analog-to-Digital Converter
AD9218
Dual 10-bit, 40 MSPS, 65 MSPS, 80 MSPS, and 105 MSPS ADC
Low power: 275 mW at 105 MSPS per channel
On-chip reference and track-and-hold
300 MHz analog bandwidth each channel
SNR = 57 dB @ 41 MHz, Encode = 80 MSPS
1 V p-p or 2 V p-p analog input range each channel
3.0 V single-supply operation (2.7 V to 3.6 V)
Power-down mode for single-channel operation
Twos complement or offset binary output mode
Output data alignment mode
Pin compatible with the 8-bit AD9288
–75 dBc crosstalk between channels FUNCTIONAL BLOCK DIAGRAM
ENCODE A
AINA
AINA AD9218 TIMING T/H ADC OUTPUT
/ REGISTER /
10
10 REFINA
REFOUT AINB ENCODE B T/H ADC OUTPUT /
/ …

10-Bit, 105 MSPS, 3 V, Dual ADC
AD9218-EP Enhanced Product
FEATURES GENERAL DESCRIPTION Dual, 10-bit, 105 MSPS ADC
Low power: 275 mW at 105 MSPS per channel
On-chip reference and track-and-hold
300 MHz analog bandwidth for each channel
SNR = 54 dB at 51 MHz, encode = 105 MSPS
1 V p-p analog input range for each channel
3.0 V single-supply operation (2.7 V to 3.6 V)
Power-down mode for single-channel operation
Twos complement or offset binary output mode
Output data alignment mode
–75 dBc crosstalk between channels The AD9218-EP is a dual, 10-bit, monolithic sampling analogto-digital converter (ADC) with on-chip track-and-hold
circuits. The product is low cost, low power, and is small and
easy to use. The AD9218-EP operates at a 105 MSPS conversion
rate with dynamic performance over its full operating range.
Each channel can be operated independently.
The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power
supply and a clock for full operation. No external reference or
driver components are required for many applications. The
digital outputs are transistor-to-transistor logic (TTL)/
complementary metal-oxide semiconductor (CMOS)
compatible, and a separate output power supply pin supports …