Datasheet Microchip PIC16F18346-I/SSVAO — 数据表

PIC16(L)F18326/18346
Full-Featured, 14/20 Low Pin Count Microcontrollers with XLP
Description
PIC16(L)F18326/18346 microcontrollers feature Analog, Core Independent Peripherals and Communication
Peripherals, combined with eXtreme Low Power (XLP) for a wide range of general purpose and low-power applications.
The Peripheral Pin Select (PPS) functionality enables pin mapping when using the digital peripherals (CLC, CWG, CCP,
PWM and communications) to add flexibility to the application design. Core Features Power-Saving Functionality • C Compiler Optimized RISC Architecture
• Operating Speed:
-DC – 32 MHz clock input
-125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Up to Four 8-bit Timers
• Up to Three 16-bit Timers
• Low-Current Power-on Reset (POR)
• Power-up Timer (PWRTE)
• Brown-out Reset (BOR) Option
• Low-Power BOR (LPBOR) Option
• Extended Watchdog Timer (WDT) with Dedicated
On-Chip Oscillator for Reliable Operation
• Programmable Code Protection • IDLE mode: ability to put the CPU core to Sleep
while internal peripherals continue operating from
the system clock …

PIC16(L)F18326/18346
Full-Featured, 14/20 Low Pin Count Microcontrollers with XLP
Description
PIC16(L)F18326/18346 microcontrollers feature Analog, Core Independent Peripherals and Communication
Peripherals, combined with eXtreme Low Power (XLP) for a wide range of general purpose and low-power applications.
The Peripheral Pin Select (PPS) functionality enables pin mapping when using the digital peripherals (CLC, CWG, CCP,
PWM and communications) to add flexibility to the application design. Core Features Power-Saving Functionality • C Compiler Optimized RISC Architecture
• Operating Speed:
-DC – 32 MHz clock input
-125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Up to Four 8-bit Timers
• Up to Three 16-bit Timers
• Low-Current Power-on Reset (POR)
• Power-up Timer (PWRTE)
• Brown-out Reset (BOR) Option
• Low-Power BOR (LPBOR) Option
• Extended Watchdog Timer (WDT) with Dedicated
On-Chip Oscillator for Reliable Operation
• Programmable Code Protection • IDLE mode: ability to put the CPU core to Sleep
while internal peripherals continue operating from
the system clock …