Datasheet Microchip PIC16F18857-I/SSVAO — 数据表

PIC16(L)F1885X/7X
Full-Featured 28/40-Pin Microcontroller Product Brief
Description
PIC16(L)F1885X/7X microcontrollers feature Analog, Core Independent Peripherals and communication peripherals,
combined with eXtreme Low Power (XLP) for a wide range of general purpose and low-power applications. The family
will feature the CRC/SCAN, HLT and Windowed WDT to support customers looking to add safety to their application.
Additionally, this family includes up to 56 KB of Flash memory, along with a 10-bit ADC with MATHPAK extensions for
automated signal analysis to reduce the complexity of the application. Core Features Power-Saving Functionality • C Compiler Optimized RISC Architecture
• Only 49 Instructions
• Operating Speed:
-DC – 32 MHz clock input
-125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Three 8-Bit Timers (TMR2/4/6) with Hardware
Limit Timer (HLT) Extensions
• Four 16-Bit Timers (TMR0/1/3/5)
• Low Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRTE)
• Brown-out Reset (BOR) with Fast Recovery
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT):
-Variable prescaler selection …

PIC16(L)F18857/77
Full-Featured 28/40/44-Pin Microcontrollers
Description
PIC16(L)F18857/77 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals,
combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications.
The family will feature the CRC/SCAN, Hardware Limit Timer (HLT) and Windowed Watchdog Timer (WWDT) to support
customers looking to add safety to their application. Additionally, this family includes up to 56 KB of Flash memory, along
with a 10-bit ADC with Computation (ADC2) extensions for automated signal analysis to reduce the complexity of the
application. Core Features Power-Saving Functionality • C Compiler Optimized RISC Architecture
• Only 49 Instructions
• Operating Speed:
-DC – 32 MHz clock input
-125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Three 8-Bit Timers (TMR2/4/6) with Hardware
Limit Timer (HLT) Extensions
• Four 16-Bit Timers (TMR0/1/3/5)
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRTE)
• Brown-out Reset (BOR) with Fast Recovery
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT): …