Datasheet Diodes PI6CB33202 — 数据表

Pb A product Line of
Diodes Incorporated Lead-free Green PI6CB33202
Very-Low-Power Two-Output PCIe Clock Buffer With On-Chip Termination Features Description ÎÎ3.3V Supply Voltage The PI6CB33202 is a two-output very-low-power PCIe Gen1/
Gen2/Gen3/Gen4/Gen5 clock buffer. It takes a reference input to
fan out two 100MHz low-power differential HCSL outputs with
on-chip terminations. The on-chip termination can save eight
external resistors and make layout easier. Individual OE pin for
each output provides easier power management. ÎÎHCSL Input: 100MHz; Also supports 50MHz, 125MHz, or 133.33MHz via SMBus ÎÎTwo Differential Low-Power HCSL Outputs with On-Chip Termination ÎÎDefault ZOUT = 85Ω
ÎÎSpread Spectrum Tolerant It uses Diodes proprietary PLL design to achieve very-low jitter
that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements.
Other than PCIe 100MHz support, this device also support Ethernet application with 50MHz, 125MHz, and 133.33MHz via
SMBus. It provides various options such as different slew rate
and amplitude through SMBUS, so users can configure the device easily to get the optimized performance for their individual
boards. ÎÎIndividual Output Enable
ÎÎProgrammable Slew Rate and Output Amplitude for Each Output ÎÎDifferential Outputs Blocked until PLL is Locked
ÎÎStrapping Pins or SMBus for Configuration
ÎÎDifferential output-to-output skew …