Datasheet IDT 5P35021-000NDG2 — 数据表

VersaClock® Programmable Clock
Generator 5P35021 Datasheet Description Features The 5P35021 is a VersaClock programmable clock generator and
is designed for low-power, consumer, and high-performance PCI
Express applications. The 5P35021 device is a three PLL
architecture design, and each PLL is individually programmable
and allowing for up to six unique frequency outputs. ▪ Configurable OE pin function as OE, PD#, PPS or DFC control
function ▪ Configurable PLL bandwidth; minimizes jitter peaking
▪ PPS: Proactive Power Saving features save power during the
end device power down mode
▪ PPB: Performance Power Balancing feature allows minimum
power consumption based on required performance
▪ DFC: Dynamic Frequency Control feature allows user to
dynamically switch between and up to 4 different frequencies
smoothly The 5P35021 has built-in unique features such as Proactive
Power Saving (PPS), Performance-Power Balancing (PPB),
Overshot Reduction Technology (ORT) and Extreme Low Power
DCO. An internal OTP memory allows the user to store the
configuration in the device. After power up, the user can change
the device register settings through the I2C interface when I2C
mode is selected. ▪ Two PLLs support independent spread spectrum clocks to
lower system EMI The device has programmable VCO and PLL source selection to
allow the user to do power-performance optimization based on the
application requirements. It also supports three single-ended …