Datasheet Analog Devices ADSP-21569 — 数据表
| 制造商 | Analog Devices |
| 系列 | ADSP-21569 |
高达 1GHz SHARC+ DSP 带 640KB L1，1024KB 共享 L2 SRAM，400 球 CSP_BGA
数据表
Datasheet ADSP-21566, ADSP-21567, ADSP-21569
PDF, 2.7 Mb, 语言: en, 修订版: 0, 文件上传: Sep 25, 2020, 页数: 98
SHARC+ Single Core High Performance DSP (Up to 1 GHz)
SHARC+ Single Core High Performance DSP (Up to 1 GHz)
从文件中提取
价格
状态
| ADSP-21569BBCZ8 | ADSP-21569KBCZ10 | ADSP-21569KBCZ8 | |
|---|---|---|---|
| Lifecycle Status | Pre-Release | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
打包
| ADSP-21569BBCZ8 | ADSP-21569KBCZ10 | ADSP-21569KBCZ8 | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Package | 400-Ball CSPBGA (17mm x 17mm x 1.28mm) | 400-Ball CSPBGA (17mm x 17mm x 1.28mm) | 400-Ball CSPBGA (17mm x 17mm x 1.28mm) |
| Pins | 400 | 400 | 400 |
| Package Code | BC-400-3 | BC-400-3 | BC-400-3 |
参数化
| Parameters / Models | ADSP-21569BBCZ8 | ADSP-21569KBCZ10 | ADSP-21569KBCZ8 |
|---|---|---|---|
| ARM Cortex-A5 | No | No | No |
| Automotive | Yes | Yes | Yes |
| External Memory Supported | DDR3, DDR3L | DDR3, DDR3L | DDR3, DDR3L |
| GPIO pins | 40 | 40 | 40 |
| MMACS | 2000 | 2000 | 2000 |
| Max Core Clock Frequency(max), Hz | 1G | 1G | 1G |
| On-Chip L1 Memory | 640 kB | 640 kB | 640 kB |
| On-Chip L2 Memory | 1024 kB | 1024 kB | 1024 kB |
| Operating Temperature Range, °C | -40 to 125 | 0 to 110 | 0 to 110 |
| Processor Product Family | SHARC + | SHARC + | SHARC + |
| SPORTs | 8 | 8 | 8 |
生态计划
| ADSP-21569BBCZ8 | ADSP-21569KBCZ10 | ADSP-21569KBCZ8 | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
其他选择
模型线
系列: ADSP-21569 (3)
制造商分类
- Processors & Microcontrollers > SHARC Audio Processors/SoCs