Datasheet ON Semiconductor NDS331N — 数据表

N-Channel Logic Level
Enhancement Mode Field
Effect Transistor
NDS331N
General Description These N−Channel logic level enhancement mode power field effect
transistors are produced using ON Semiconductor’s proprietary, high
cell density, DMOS technology. This very high density process is
especially tailored to minimize on−state resistance. These devices are
particularly suited for low voltage applications in notebook
computers, portable phones, PCMCIA cards, and other battery
powered circuits where fast switching, and low in−line power loss are
needed in a very small outline surface mount package. www.onsemi.com D
G S SOT−23/SUPERSOT−23, 3 LEAD, 1.4x2.9
CASE 527AG Features • 1.3 A, 20 V MARKING DIAGRAM RDS(on) = 0.21 @ VGS = 2.7 V
♦ RDS(on) = 0.16 @ VGS = 4.5 V
Industry Standard Outline SOT−23 Surface Mount Package Using
Proprietary SUPERSOTt−3 Design for Superior Thermal and
Electrical Capabilities
High Density Cell Design for Extremely Low RDS(on)
Exceptional On−Resistance and Maximum DC Current Capability
This is a Pb−Free Device
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