Datasheet Texas Instruments OPA695IDBVTG4 — 数据表

制造商	Texas Instruments
系列	OPA695
零件号	OPA695IDBVTG4

具有禁用6-SOT-23的超宽带电流反馈运算放大器-40至85

数据表

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PDF, 1.8 Mb, 修订版: H, 档案已发布: Dec 31, 2015

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价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes

打包

Pin	6
Package Type	DBV
Industry STD Term	SOT-23
JEDEC Code	R-PDSO-G
Package QTY	250
Carrier	SMALL T&R
Device Marking	A71L
Width (mm)	1.6
Length (mm)	2.9
Thickness (mm)	1.2
Pitch (mm)	.95
Max Height (mm)	1.45
Mechanical Data	下载

参数化

2nd Harmonic	65 dBc
3rd Harmonic	86 dBc
@ MHz	10
Acl, min spec gain	1 V/V
Additional Features	Shutdown
Architecture	Bipolar,Current FB
BW @ Acl	1700 MHz
CMRR(Min)	51 dB
CMRR(Typ)	56 dB
GBW(Typ)	1700 MHz
Input Bias Current(Max)	30000000 pA
Iq per channel(Max)	13.3 mA
Iq per channel(Typ)	12.9 mA
Number of Channels	1
Offset Drift(Typ)	15 uV/C
Operating Temperature Range	-40 to 85 C
Output Current(Typ)	120 mA
Package Group	SOT-23
Package Size: mm2:W x L	6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23) PKG
Rail-to-Rail	No
Rating	Catalog
Slew Rate(Typ)	4300 V/us
Total Supply Voltage(Max)	12 +5V=5, +/-5V=10
Total Supply Voltage(Min)	5 +5V=5, +/-5V=10
Vn at 1kHz(Typ)	1.8 nV/rtHz
Vn at Flatband(Typ)	1.8 nV/rtHz
Vos (Offset Voltage @ 25C)(Max)	3 mV

生态计划

RoHS

Compliant

设计套件和评估模块

Evaluation Modules & Boards: DEM-OPA-SOT-1B
DEM-OPA-SOT-1B
Lifecycle Status: Active (Recommended for new designs)
- 下载
Evaluation Modules & Boards: DEM-OPA-ADS-SO-1A
DEM-OPA-ADS-SO-1A
Lifecycle Status: Preview (Device has been announced but is not in production. Samples may or may not be available)
Evaluation Modules & Boards: DEM-OPA-SO-1B
DEM-OPA-SO-1B
Lifecycle Status: Active (Recommended for new designs)
- 下载

应用须知

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Design for a Wideband Differential Transimpedance DAC Output (Rev. A)
PDF, 438 Kb, 修订版: A, 档案已发布: Oct 17, 2016
High-speed digital-to-analog converters commonly offer a complementary current output signal. Most output interface implementations use either a resistive load and/or a transformer to convert this current source signal to a voltage. Where a dc-coupled interface is required, a carefully designed differential transimpedance stage can offer an attractive alternative. Design considerations and options
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Voltage Feedback vs. Current Feedback Op Amps
PDF, 93 Kb, 档案已发布: Nov 30, 1998
This application report contrasts and compares the characteristics and capabilities of voltage and current feedback operational amplifiers. The report also points out the many similarities between the two versions.
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Stabilizing Current-Feedback Op Amps While Optimizing Circuit Performance
PDF, 280 Kb, 档案已发布: Apr 28, 2004
Optimizing a circuit design with a current-feedback (CFB) op amp is a relatively straightforward task, once one understands how CFB op amps achieve stability. This application note explains a 2nd-order CFB model so that any designer can better understand the flexibility of the CFB op amp. This report also discusses stability analysis, the effects of parasitic components due to PCBs, optimization
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Expanding the usability of current-feedback amplifiers
PDF, 215 Kb, 档案已发布: Feb 28, 2005
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Active filters using current-feedback amplifiers
PDF, 227 Kb, 档案已发布: Feb 25, 2005
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Wireline Data Transmission and Reception
PDF, 191 Kb, 档案已发布: Jan 27, 2010
Many types of wires are widely used to transmit data. Specifically, Category 3 and Category 5 (Cat3 and Cat5e, respectively)вЂ”also known as unshielded twisted pair or UTP linesвЂ”are now recommended for new telephone installations. Coaxial (coax) cables are used to distribute cable television (CATV) signals throughout a home. #12 and #14 American wire gauge (AWG) electric power distribution wire is a
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Designing for low distortion with high-speed op amps
PDF, 277 Kb, 档案已发布: Mar 2, 2005
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ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
PDF, 273 Kb, 档案已发布: Apr 22, 2004
Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
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Wideband Complementary Current Output DAC Single-Ended Interface
PDF, 597 Kb, 档案已发布: Jun 21, 2005
High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op ampdifferential to single-ended stage has often been used. This application note steps through the exact design equations required to achieve gain matching from each output as well as a matched input impedance to each of the DA
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Measuring Board Parasitics in High-Speed Analog Design
PDF, 134 Kb, 档案已发布: Jul 7, 2003
Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
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Noise Analysis for High Speed Op Amps (Rev. A)
PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

模型线

系列: OPA695 (10)

OPA695ID OPA695IDBVR OPA695IDBVRG4 OPA695IDBVT OPA695IDBVTG4 OPA695IDG4 OPA695IDGKR OPA695IDGKT OPA695IDR OPA695IDRG4

制造商分类

Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)