Datasheet AD8138 (Analog Devices) - 8

制造商Analog Devices
描述Low Distortion Differential ADC Driver
页数 / 页25 / 8 — Data Sheet. AD8138. ABSOLUTE MAXIMUM RATINGS Table 5. Parameter. Ratings. …
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Data Sheet. AD8138. ABSOLUTE MAXIMUM RATINGS Table 5. Parameter. Ratings. THERMAL RESISTANCE. 1.75. Table 6. 1.50. (W N. Package Type. θJA

Data Sheet AD8138 ABSOLUTE MAXIMUM RATINGS Table 5 Parameter Ratings THERMAL RESISTANCE 1.75 Table 6 1.50 (W N Package Type θJA

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Data Sheet AD8138 ABSOLUTE MAXIMUM RATINGS Table 5.
The power dissipated in the package (PD) is the sum of the
Parameter Ratings
quiescent power dissipation and the power dissipated in the Supply Voltage ±5.5 V package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (V V S) times the OCM ±VS quiescent current (I Internal Power Dissipation 550 mW S). The load current consists of the differential and common-mode currents flowing to the load, as well as Operating Temperature Range −40°C to +85°C currents flowing through the external feedback networks and Storage Temperature Range −65°C to +150°C internal common-mode feedback loop. The internal resistor tap Lead Temperature (Soldering 10 sec) 300°C used in the common-mode feedback loop places a negligible Junction Temperature 150°C differential load on the output. RMS voltages and currents Stresses at or above those listed under Absolute Maximum should be considered when dealing with ac signals. Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these Airflow reduces θJA. In addition, more metal directly in contact or any other conditions above those indicated in the operational with the package leads from metal traces through holes, ground, section of this specification is not implied. Operation beyond and power planes reduces the θJA. the maximum operating conditions for extended periods may Figure 3 shows the maximum safe power dissipation in the affect product reliability. package vs. the ambient temperature for the 8-lead SOIC
THERMAL RESISTANCE
(121°C/W) and 8-lead MSOP (θJA = 145°C/W) packages on a θ JEDEC standard 4-layer board. θJA values are approximations. JA is specified for the worst-case conditions, that is, θJA is specified for the device soldered in a circuit board in still air.
1.75 ) Table 6. 1.50 (W N Package Type θJA Unit IO T 1.25
8-Lead SOIC/4-Layer 121 °C/W
PA
8-Lead MSOP/4-Layer 145 °C/W
ISSI 1.00 D SOIC ER W 0.75 Maximum Power Dissipation MSOP M PO
The maximum safe power dissipation in the AD8138 packages
0.50 MU
is limited by the associated rise in junction temperature (T
XI
J) on
MA 0.25
the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily
0
049
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120
exceeding this temperature limit can change the stresses that the
AMBIENT TEMPERATURE (°C)
01073- package exerts on the die, permanently shifting the parametric Figure 3. Maximum Power Dissipation vs. Temperature performance of the AD8138. Exceeding a junction temperature of 150°C for an extended period can result in changes in the
ESD CAUTION
silicon devices, potentially causing failure. Rev. G | Page 7 of 24 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±DIN TO ±OUT SPECIFICATIONS VOCM TO ±OUT SPECIFICATIONS ±DIN TO ±OUT SPECIFICATIONS VOCM TO ±OUT SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OPERATIONAL DESCRIPTION DEFINITION OF TERMS THEORY OF OPERATION ANALYZING AN APPLICATION CIRCUIT SETTING THE CLOSED-LOOP GAIN ESTIMATING THE OUTPUT NOISE VOLTAGE THE IMPACT OF MISMATCHES IN THE FEEDBACK NETWORKS CALCULATING THE INPUT IMPEDANCE OF AN APPLICATION INPUT COMMON-MODE VOLTAGE RANGE IN SINGLE-SUPPLY APPLICATIONS SETTING THE OUTPUT COMMON-MODE VOLTAGE DRIVING A CAPACITIVE LOAD LAYOUT, GROUNDING, AND BYPASSING BALANCED TRANSFORMER DRIVER HIGH PERFORMANCE ADC DRIVING 3 V OPERATION OUTLINE DIMENSIONS ORDERING GUIDE