Datasheet ADP1071-1, ADP1071-2 (Analog Devices) - 9

Preliminary Technical Data ADP1071-1/ADP1071-2 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 6. Pin Function Descriptions Pin ADP1071-1 ADP1071-2 Description
1 GATE GATE Driver output for main power MOSFET on the primary side. Multiple function pin. Connect a resistor from GATE to AGND1 to setup the open loop soft start time. 2 AGND1 AGND1 Ground for primary 3 VREG1 VREG1 8V regulated LDO output for the MOSFET driver. Connect 1uF or greater from VREG1 to AGND1. 4
MODE -
ADP1071-1 only: Connect MODE to GND to enable forced continuous conduction mode (CCM), or to a high logic (2.5V or higher) to force a LLM operation, or to a resistor to setup a fixed light load mode (LLM) threshold voltage. 4
- VIN
ADP1071-2 only: Input voltage. See input voltage section. Connect a 4.7µF capacitor at this pin. The size of this capacitor can be reduced if the input voltage to this pin is guaranteed to be stable. This pin is referenced to AGND1. 5 EN EN Precision enable input. The controller is enabled when EN is above the EN threshold voltage. This pin also has a programmable EN hysteresis. This pin is referenced to AGND1. 6 CS CS Input current sensing. This pin senses the input pulse width modulated current. Place a current sense resistor between the source terminal of the power MOSFET and PGND1. This current sense resistor sets up the input current limit. This pin is also used for external slope compensator. Connect a resistor from CS to the current sense resistor to generate a voltage ramp for the slope compensation. This pin is referenced to AGND1. It is recommended to connect a 33-100pF capacitor at this pin which acts as an RC filter along with the slope compensation resistor. 7 RT RT Connect a resistor from RT to AGND1 to set the oscillator frequency. 8 SYNC SYNC Connect an external clock to the SYNC pin to synchronize the internal oscillator to this external clock frequency. Connect SYNC to AGND1 if this feature is not used. It is recommended that the SYNC frequency be within 10% of the frequency set by the RT pin. 9 SS2 SS2 Soft start on secondary. Connect a capacitor from SS2 to AGND2 to setup the soft start time on the secondary. 10 COMP COMP Compensation node on the secondary. This pin is the output of the gm amplifier. This pin is referenced to AGND2. 11 FB FB Feedback node on the secondary. Set up the resistor divider from the output voltage such that the nominal voltage when the power supply is in regulation is 1.2 Volts. This pin is referenced to AGND2. 12 OVP OVP Output overvoltage protection (OVP). The OVP threshold is set at 1.36 Volts. Connect a resistive divider from OVP to the output and AGND2. 13 VDD2 VDD2 Input supply on the secondary. Connect VDD2 to the output voltage for a self-driven configuration. Connect a 4.7µF capacitor from this pin to AGND2. The size of this capacitor can be reduced if the input voltage to this pin is guaranteed to be stable. 14 VREG2 VREG2 5V regulated LDO output for internal bias and powering the drivers of the synchronous rectifiers. Do not use this pin as a reference or load this pin in any way. Connect a 1µF capacitor from this pin to AGND2. 15 AGND2 AGND2 Analog ground on secondary. 16 SR SR Driver output for synchronous rectifier MOSFET. Rev. PrA | Page 9 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS TYPICAL APPLICATION CIRCUITS SPECIFICATIONS REGULATORY INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS SIMPLIFIED BLOCK DIAGRAM APPLICATIONS INFORMATION INSULATION LIFETIME OUTLINE DIMENSIONS