Datasheet LTC6104 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | High Voltage, High Side, Bi-Directional Current Sense Amplifier |
| 页数 / 页 | 16 / 7 — BLOCK DIAGRAM. Figure 1. LTC6104 Block Diagram. THEORY OF OPERATION |
| 文件格式/大小 | PDF / 317 Kb |
| 文件语言 | 英语 |
BLOCK DIAGRAM. Figure 1. LTC6104 Block Diagram. THEORY OF OPERATION
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文件文字版本
LTC6104
BLOCK DIAGRAM
I V LOAD SENSE – + RSENSE RINB RINA 8 7 6 5 +INA –INA VS –INB +INB 10V 10V 5k 5k 5k 5k + – – + V– A V+ B V– V+ 10V OUT V– 1 4 6104 F01 VOUT ROUT R V OUT + V OUT = VSENSE • REF RIN + VREF –
Figure 1. LTC6104 Block Diagram THEORY OF OPERATION
When VSENSE is positive, an internal sense amplifi er loop “B” amplifi er, the “A” amplifi er will be inactive. The signal forces –INA to have the same potential as +INA. Connect- current goes into the –INB pin, through the MOSFET, and ing an external resistor, RINA, in series with –INA causes into the current mirror. The mirror reverses the polarity of a current, VSENSE/RINA, to fl ow through RINA. The high the signal so that current fl ows into the “OUT” pin, causing impedance inputs of the sense amplifi er will not conduct the output voltage to change polarity. The magnitude of the this input current, so the current will fl ow through an output is then VSENSE • ROUT/RINB + VREF . Keep in mind internal MOSFET to the OUT pin. that the OUT voltage cannot swing below V–, even though it’s sinking current. A proper V The output current can be transformed into a voltage by REF and ROUT need to be chosen so that the designed OUT voltage swing does not adding a resistor from OUT to a reference voltage (VREF). The go beyond the specifi ed voltage range of the output. output voltage is then VOUT = (VSENSE/RINA) • ROUT + VREF. When operating on a dual supply, ROUT can be tied to ground. Supply current is drawn from +INB pin. The user may The output voltage is then VOUT = (VSENSE/RINA) • ROUT. choose to include this current in the monitored current through R Only one amplifi er is active at a time in the LTC6104. If the SENSE by careful choice of connection polarity. load current direction (VSENSE is negative) activates the 6104f 7
BLOCK DIAGRAM
I V LOAD SENSE – + RSENSE RINB RINA 8 7 6 5 +INA –INA VS –INB +INB 10V 10V 5k 5k 5k 5k + – – + V– A V+ B V– V+ 10V OUT V– 1 4 6104 F01 VOUT ROUT R V OUT + V OUT = VSENSE • REF RIN + VREF –
Figure 1. LTC6104 Block Diagram THEORY OF OPERATION
When VSENSE is positive, an internal sense amplifi er loop “B” amplifi er, the “A” amplifi er will be inactive. The signal forces –INA to have the same potential as +INA. Connect- current goes into the –INB pin, through the MOSFET, and ing an external resistor, RINA, in series with –INA causes into the current mirror. The mirror reverses the polarity of a current, VSENSE/RINA, to fl ow through RINA. The high the signal so that current fl ows into the “OUT” pin, causing impedance inputs of the sense amplifi er will not conduct the output voltage to change polarity. The magnitude of the this input current, so the current will fl ow through an output is then VSENSE • ROUT/RINB + VREF . Keep in mind internal MOSFET to the OUT pin. that the OUT voltage cannot swing below V–, even though it’s sinking current. A proper V The output current can be transformed into a voltage by REF and ROUT need to be chosen so that the designed OUT voltage swing does not adding a resistor from OUT to a reference voltage (VREF). The go beyond the specifi ed voltage range of the output. output voltage is then VOUT = (VSENSE/RINA) • ROUT + VREF. When operating on a dual supply, ROUT can be tied to ground. Supply current is drawn from +INB pin. The user may The output voltage is then VOUT = (VSENSE/RINA) • ROUT. choose to include this current in the monitored current through R Only one amplifi er is active at a time in the LTC6104. If the SENSE by careful choice of connection polarity. load current direction (VSENSE is negative) activates the 6104f 7