Datasheet LTC1443, LTC1444, LTC1445 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | Ultralow Power Quad Comparators with Reference |
| 页数 / 页 | 14 / 9 — applicaTions inForMaTion. Hysteresis. Figure 3a. V+ Glitching Test … |
| 文件格式/大小 | PDF / 238 Kb |
| 文件语言 | 英语 |
applicaTions inForMaTion. Hysteresis. Figure 3a. V+ Glitching Test Circuit. Figure 4. Programmable Hysteresis
该数据表的模型线
- LTC1443CDHD#PBF LTC1443CDHD#PBF LTC1443CDHD#TRPBF LTC1443CDHD#TRPBF LTC1443CN#PBF LTC1443CN#PBF LTC1443CS#PBF LTC1443CS#PBF LTC1443CS#TRPBF LTC1443CS#TRPBF LTC1443IDHD#PBF LTC1443IDHD#PBF LTC1443IDHD#TRPBF LTC1443IDHD#TRPBF LTC1443IN#PBF LTC1443IN#PBF LTC1443IS#PBF LTC1443IS#PBF LTC1443IS#TRPBF LTC1443IS#TRPBF
- LTC1444CDHD#PBF LTC1444CDHD#PBF LTC1444CDHD#TRPBF LTC1444CDHD#TRPBF LTC1444CN#PBF LTC1444CN#PBF LTC1444CS#PBF LTC1444CS#PBF LTC1444CS#TRPBF LTC1444CS#TRPBF LTC1444IDHD#PBF LTC1444IDHD#PBF LTC1444IDHD#TRPBF LTC1444IDHD#TRPBF LTC1444IN#PBF LTC1444IN#PBF LTC1444IS#PBF LTC1444IS#PBF LTC1444IS#TRPBF LTC1444IS#TRPBF
- LTC1445CDHD#PBF LTC1445CDHD#PBF LTC1445CDHD#TRPBF LTC1445CDHD#TRPBF LTC1445CN#PBF LTC1445CN#PBF LTC1445CS#PBF LTC1445CS#PBF LTC1445CS#TRPBF LTC1445CS#TRPBF LTC1445IDHD#PBF LTC1445IDHD#PBF LTC1445IDHD#TRPBF LTC1445IDHD#TRPBF LTC1445IN#PBF LTC1445IN#PBF LTC1445IS#PBF LTC1445IS#PBF LTC1445IS#TRPBF LTC1445IS#TRPBF
文件文字版本
LTC1443/LTC1444/LTC1445
applicaTions inForMaTion
Bypassing the reference can help prevent false tripping of
Hysteresis
the comparators by preventing glitches on the V+ or the Hysteresis can be added to the LTC1444/LTC1445 by con- reference output voltage. Figure 3 shows the bypassed necting a resistor (R1) between the REF and HYST pins, reference output with a square wave applied to the V+ pin. Resistors R1 and R2 set 10mV of hysteresis, while R3 and a second resistor (R2) from HYST to V– (Figure 4). damps the reference response. Note that the comparator The difference between the upper and lower threshold volt- output doesn’t trip. ages or hysteresis voltage band (VHB) is equal to twice the voltage difference between the REF and HYST pins. When more hysteresis is added, the upper threshold increases 3 the same amount as the lower threshold decreases. The 5V V+ TO 8V maximum voltage allowed between REF and HYST is IN A+ 5 + 50mV, producing a maximum hysteresis voltage band of 2 OUT 100mV. If hysteresis is not wanted, the HYST pin should 4 IN A– – be shorted to REF. Acceptable values for IREF range from 14 HYST 0.1µA to 5µA. If 2.4M is chosen for R2, then R1(kΩ) = R1 10k LTC1445 V 8 REF HB (mV). + R2 R3 1.2V – 8 VHB 2.4M 430Ω R1 = V– I REF REF (2)(IREF) C1 9 R1 LTC1445 1.0µF 14 HYST VHB (1.221V – ) 144345 F03a 2 R2 = R2 IREF 144345 F04 9
Figure 3a. V+ Glitching Test Circuit Figure 4. Programmable Hysteresis
8V V+ 5V VREF 2mV/DIV OUT 144345 F03b 2ms/DIV
Figure 3b. V+ Glitching Response
144345fe 9 Document Outline Features Applications Description Absolute Maximum Ratings Typical Application Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Applications Information Package Description Revision History Typical Application Related Parts
applicaTions inForMaTion
Bypassing the reference can help prevent false tripping of
Hysteresis
the comparators by preventing glitches on the V+ or the Hysteresis can be added to the LTC1444/LTC1445 by con- reference output voltage. Figure 3 shows the bypassed necting a resistor (R1) between the REF and HYST pins, reference output with a square wave applied to the V+ pin. Resistors R1 and R2 set 10mV of hysteresis, while R3 and a second resistor (R2) from HYST to V– (Figure 4). damps the reference response. Note that the comparator The difference between the upper and lower threshold volt- output doesn’t trip. ages or hysteresis voltage band (VHB) is equal to twice the voltage difference between the REF and HYST pins. When more hysteresis is added, the upper threshold increases 3 the same amount as the lower threshold decreases. The 5V V+ TO 8V maximum voltage allowed between REF and HYST is IN A+ 5 + 50mV, producing a maximum hysteresis voltage band of 2 OUT 100mV. If hysteresis is not wanted, the HYST pin should 4 IN A– – be shorted to REF. Acceptable values for IREF range from 14 HYST 0.1µA to 5µA. If 2.4M is chosen for R2, then R1(kΩ) = R1 10k LTC1445 V 8 REF HB (mV). + R2 R3 1.2V – 8 VHB 2.4M 430Ω R1 = V– I REF REF (2)(IREF) C1 9 R1 LTC1445 1.0µF 14 HYST VHB (1.221V – ) 144345 F03a 2 R2 = R2 IREF 144345 F04 9
Figure 3a. V+ Glitching Test Circuit Figure 4. Programmable Hysteresis
8V V+ 5V VREF 2mV/DIV OUT 144345 F03b 2ms/DIV
Figure 3b. V+ Glitching Response
144345fe 9 Document Outline Features Applications Description Absolute Maximum Ratings Typical Application Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Applications Information Package Description Revision History Typical Application Related Parts