Datasheet MCP6441, MCP6442, MCP6444 (Microchip) - 4

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MCP6441/2/4 AC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, V ≈ CM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions AC Response
Gain Bandwidth Product GBWP — 9 — kHz Phase Margin PM — 65 — ° G = +1 V/V Slew Rate SR — 3 — V/ms
Noise
Input Noise Voltage Eni — 5 — µVp-p f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 190 — nV/√Hz f = 1 kHz Input Noise Current Density ini — 0.6 — fA/√Hz f = 1 kHz
TEMPERATURE SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, VDD = +1.4V to +6.0V and VSS = GND.
Parameters Sym Min Typ Max Units Conditions Temperature Ranges
Operating Temperature Range TA -40 — +125 °C Note 1 Storage Temperature Range TA -65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SC70 θJA — 331 — °C/W Thermal Resistance, 5L-SOT-23 θJA — 220.7 — °C/W Thermal Resistance, 8L-MSOP θJA — 211 — °C/W Thermal Resistance, 8L-SOIC θJA — 149.5 — °C/W Thermal Resistance, 8L-2x3 TDFN θJA — 52.5 — °C/W Thermal Resistance, 14L-SOIC θJA — 95.3 — °C/W Thermal Resistance, 14L-TSSOP θJA — 100 — °C/W
Note 1:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
1.2 Test Circuits
The circuit used for most DC and AC tests is shown in CF 6.8 pF Figure 1-1. This circuit can independently set VCM and VOUT (see Equation 1-1). Note that VCM is not the circuit’s Common Mode voltage ((V RG RF P + VM)/2), and that V 100 kΩ 100 kΩ OST includes VOS plus the effects (on the input offset V V error, V P DD/2 OST) of the temperature, CMRR, PSRR and V A DD OL. VIN+ C C
EQUATION 1-1:
B1 B2
MCP6441
100 nF 1 µF G = R ⁄ R DM F G V = (V + V ⁄ 2) ⁄ 2 C M P DD VIN– V = V – V OST IN – IN+ V V M OUT V = (V ⁄ 2) + (V – V ) + V (1 + G ) OUT DD P M OST DM R R C G RF L L Where: 100 kΩ 100 kΩ 1 MΩ 60 pF GDM = Differential Mode Gain (V/V) C V F CM = Op Amp’s Common Mode (V) 6.8 pF VL Input Voltage
FIGURE 1-1:
AC and DC Test Circuit for VOST = Op Amp’s Total Input Offset Voltage (mV) Most Specifications. DS22257C-page 4 © 2010-2012 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 6.0V. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.4V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Current vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Power Supply Voltage. FIGURE 2-15: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-16: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-17: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-18: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-21: Output Voltage Swing vs. Frequency. FIGURE 2-22: Output Voltage Headroom vs. Output Current. FIGURE 2-23: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-24: Slew Rate vs. Ambient Temperature. FIGURE 2-25: Small Signal Non-Inverting Pulse Response. FIGURE 2-26: Small Signal Inverting Pulse Response. FIGURE 2-27: Large Signal Non-Inverting Pulse Response. FIGURE 2-28: Large Signal Inverting Pulse Response. FIGURE 2-29: The MCP6441/2/4 Device Shows No Phase Reversal. FIGURE 2-30: Closed Loop Output Impedance vs. Frequency. FIGURE 2-31: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-32: Channel-to-Channel Separation vs. Frequency (MCP6442/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 4.0 Application Information FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. FIGURE 4-6: Example Guard Ring Layout for Inverting Gain. FIGURE 4-7: Battery Current Sensing. FIGURE 4-8: Precision Half-Wave Rectifier. FIGURE 4-9: Two Op Amp Instrumentation Amplifier. 5.0 Design Aids 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service