Datasheet MCP6L1, MCP6L1R, MCP6L2, MCP6L4 (Microchip) - 4

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MCP6L1/1R/2/4 TABLE 1-2: AC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = 25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT  VDD/2, VL = VDD/2, RL = 10 k to VL and CL = 60 pF (refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions AC Response
Gain Bandwidth Product GBWP — 2.8 — MHz Phase Margin PM — 50 — ° G = +1 (degree) Slew Rate SR — 2.3 — V/µs
Noise
Input Noise Voltage Eni — 7 — µVP-P f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 21 — nV/Hz f = 10 kHz Input Noise Current Density ini — 0.6 — fA/Hz f = 1 kHz
TABLE 1-3: TEMPERATURE SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, all limits are specified for: VDD = +2.7V to +6.0V, VSS = GND.
Parameters Sym Min Typ Max Units Conditions Temperature Ranges
Specified Temperature Range TA -40 — +125 °C Operating Temperature Range TA -40 — +125 °C
(Note 1)
Storage Temperature Range TA -65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23 JA — 220.7 — °C/W Thermal Resistance, 8L-MSOP JA — 211 — °C/W Thermal Resistance, 8L-SOIC (150 mil) JA — 149.5 — °C/W Thermal Resistance, 14L-SOIC JA — 95.3 — °C/W Thermal Resistance, 14L-TSSOP JA — 100 — °C/W
Note 1:
Operation must not cause TJ to exceed Maximum Junction Temperature specification (150°C).
1.3 Test Circuit
The circuit used for most DC and AC tests is shown in CF Figure 1-1. This circuit can independently set VCM and 6.8 pF VOUT; see Equation 1-1. Note that VCM is not the cir- cuit’s common-mode voltage ((VP + VM)/2) and that RG RF VOST includes VOS, plus the effects (on the input offset 100 k 100 k error, VOST) of temperature, CMRR, PSRR and AOL. V V P DD/2 VDD
EQUATION 1-1:
VIN+ C C G B1 B2 =  DM RF RG
MCP6LX
100 nF 1 µF V =  +    CM VP VDD 2 2 VOST = VIN– – VIN+ VIN- V =    +   +   OUT VDD 2 VP – VM VOST 1 + GDM V V Where: M OUT RG R R C F L L GDM = Differential-Mode Gain (V/V) 100 k 100 k 10 k 60 pF VCM = Op Amp’s Common-Mode (V) Input Voltage CF V V OST = Op Amp’s Total Input Offset (mV) 6.8 pF L Voltage
FIGURE 1-1:
AC and DC Test Circuit for Most Specifications. DS22135C-page 4  2009-2012 Microchip Technology Inc. Document Outline MCP6L1/1R/2/4 - 2.8 MHz, 200 μA Op Amps 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Test Circuit FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage vs. Common-Mode Input Voltage at VDD = 2.7V. FIGURE 2-2: Input Offset Voltage vs. Common-Mode Input Voltage at VDD = 5.5V. FIGURE 2-3: Input Offset Voltage vs. Ambient Temperature. FIGURE 2-4: Input Common-Mode Range Voltage vs. Ambient Temperature. FIGURE 2-5: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-6: CMRR, PSRR vs. Frequency. FIGURE 2-7: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-8: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Frequency. FIGURE 2-10: The MCP6L1/1R/2/4 Show No Phase Reversal. FIGURE 2-11: Quiescent Current vs. Power Supply Voltage. FIGURE 2-12: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-13: Ratio of Output Voltage Headroom to Output Current vs. Output Current. FIGURE 2-14: Small Signal, Non-Inverting Pulse Response. FIGURE 2-15: Large Signal, Non-Inverting Pulse Response. FIGURE 2-16: Slew Rate vs. Ambient Temperature. FIGURE 2-17: Output Voltage Swing vs. Frequency. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Application Information 4.1 Inputs FIGURE 4-1: Protecting the Analog Inputs. FIGURE 4-2: Unity Gain Buffer has a Limited VOUT Range. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-3: Output Resistor, RISO, Stabilizes Large Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-4: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-5: Example Guard Ring Layout. 4.7 Application Circuits FIGURE 4-6: Sallen Key Topology. FIGURE 4-7: Multiple Feedback Topology. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Worldwide Sales and Service