Datasheet MCP601, MCP601R, MCP602, MCP603, MCP604 (Microchip) - 5 制造商 Microchip 描述 MCP601 operational amplifier (op amp) has a gain bandwidth product of 2.8 MHz with low typical operating current of 230 uA and an offset voltage that is less than 2 mV 页数 / 页 34 / 5 — MCP601/1R/2/3/4. 2.0. TYPICAL PERFORMANCE CURVES. Note:. 120. 300 IO = 0. … 文件格式/大小 PDF / 600 Kb 文件语言 英语
MCP601/1R/2/3/4. 2.0. TYPICAL PERFORMANCE CURVES. Note:. 120. 300 IO = 0. 100. -30. Phase. 250. -60. Gain. -90. ase (. 200. r (µA). Current. -120. 150. ent
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该数据表的模型线 文件文字版本 MCP601/1R/2/3/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.Note: Unless otherwise indicated, TA = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL, CL = 50 pF and CS is tied low.120 0 300 IO = 0 100 ) -30 B Phase °) 250 d 80 -60 Gain 60 -90 ase ( 200 h r (µA) Current 40 -120 150 ent Loop Gain ( 20 -150 Loop P sc 100 r Amplifie TA = -40°C 0 -180 T Quie pe A = +25°C Open- T -20 -210 Open- 50 A = +85°C TA = +125°C -40 -240 0 1.E 0. -1 1.E1+ 1.E+ 10 1.E 10 + 0 1.E 1 + k 1.E 1 + 0k 1.E 10 + 0k 1.E+ 1M 1.E 10 + M 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 01 00 01 02 03 Frequency 04 (Hz) 05 06 07 Supply Voltage (V) FIGURE 2-1: Open-Loop Gain, Phase vs.FIGURE 2-4: Quiescent Current vs. Frequency. Supply Voltage.3.5 300 V I DD = 5.0V O = 0 3.0 250 Falling Edge V 2.5 DD = 5.5V /µs) 200 r (µA) (V 2.0 te Current Rising Edge 150 1.5 ent VDD = 2.7V sc lew Ra 100 1.0 r Amplifie S Quie pe 0.5 50 0.0 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Ambient Temperature (°C) Ambient Temperature (°C) FIGURE 2-2: Slew Rate vs. Temperature.FIGURE 2-5: Quiescent Current vs. Temperature.5.5 110 1.E+04 10µ 5.0 100 y GBWP 4.5 90 roduct 4.0 80 P 3.5 1.E+03 1µ h 70 z) 3.0 H 60 Hz) (M 2.5 50 rgin, G = +1 (°) / √(V 2.0 PM, G = +1 40 1.E+02 100n 1.5 30 e Ma s 1.0 20 Gain Bandwidt 0.5 10 Pha Input Noise Voltage Densit 0.0 0 1.E+01 10n -50 -25 0 25 50 75 100 125 0.1 1 10 100 1k 10k 100k 1M 1.E- 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 Ambient Temperature (°C) 01 0 1 2 3 Frequency (Hz) 4 5 6 FIGURE 2-3: Gain Bandwidth Product,FIGURE 2-6: Input Noise Voltage Density Phase Margin vs. Temperature. vs. Frequency. © 2007 Microchip Technology Inc. DS21314G-page 5 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: MCP603 Chip Select (CS) Timing Diagram. 1.1 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. 2.0 Typical Performance Curves FIGURE 2-1: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-2: Slew Rate vs. Temperature. FIGURE 2-3: Gain Bandwidth Product, Phase Margin vs. Temperature. FIGURE 2-4: Quiescent Current vs. Supply Voltage. FIGURE 2-5: Quiescent Current vs. Temperature. FIGURE 2-6: Input Noise Voltage Density vs. Frequency. FIGURE 2-7: Input Offset Voltage. FIGURE 2-8: Input Offset Voltage vs. Temperature. FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.7V. FIGURE 2-10: Input Offset Voltage Drift. FIGURE 2-11: CMRR, PSRR vs. Temperature. FIGURE 2-12: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-13: Channel-to-Channel Separation vs. Frequency. FIGURE 2-14: Input Bias Current, Input Offset Current vs. Ambient Temperature. FIGURE 2-15: DC Open-Loop Gain vs. Load Resistance. FIGURE 2-16: CMRR, PSRR vs. Frequency. FIGURE 2-17: Input Bias Current, Input Offset Current vs. Common Mode Input Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Supply Voltage. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Load Resistance. FIGURE 2-20: Output Voltage Headroom vs. Output Current. FIGURE 2-21: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-22: DC Open-Loop Gain vs. Temperature. FIGURE 2-23: Output Voltage Headroom vs. Temperature. FIGURE 2-24: Output Short-Circuit Current vs. Supply Voltage. FIGURE 2-25: Large Signal Non-Inverting Pulse Response. FIGURE 2-26: Small Signal Non-Inverting Pulse Response. FIGURE 2-27: Chip Select Timing (MCP603). FIGURE 2-28: Large Signal Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Quiescent Current Through VSS vs. Chip Select Voltage (MCP603). FIGURE 2-31: Chip Select Pin Input Current vs. Chip Select Voltage. FIGURE 2-32: Hysteresis of Chip Select’s Internal Switch. FIGURE 2-33: The MCP601/1R/2/3/4 family of op amps shows no phase reversal under input overdrive. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table For Single Op Amps TABLE 3-2: Pin Function Table For Dual And Quad Op Amps 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Chip Select Digital Input 3.4 Power Supply Pins 4.0 Applications Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Unity Gain Buffer has a Limited VOUT Range. 4.2 Rail-to-Rail Output 4.3 MCP603 Chip Select 4.4 Capacitive Loads FIGURE 4-4: Output resistor RISO stabilizes large capacitive loads. FIGURE 4-5: Recommended RISO values for capacitive loads. 4.5 Supply Bypass 4.6 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.7 PCB Surface Leakage FIGURE 4-7: Example Guard Ring layout. 4.8 Typical Applications FIGURE 4-8: Second-Order, Low-Pass Sallen-Key Filter. FIGURE 4-9: Second-Order, Low-Pass Multiple-Feedback Filter. FIGURE 4-10: Three-Op Amp Instrumentation Amplifier. FIGURE 4-11: Two-Op Amp Instrumentation Amplifier. FIGURE 4-12: Photovoltaic Mode Detector. FIGURE 4-13: Photoconductive Mode Detector. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Simulatior Tool 5.4 MAPS (Microchip Advanced Part Selector) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information