Datasheet MCP6491, MCP6492, MCP6494 (Microchip) - 10

MCP6491/2/4 Note:
Unless otherwise indicated, T  A = +25°C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF.
14 70 10 ) V = 5.5V DD 12 60 P-P V = 2.4V 10 Phase Margin 50 DD ing (V idth Product 8 40 Sw (MHz) 1 6 30 ltage hase Margin (°) Bandw o n 4 Gain Bandw Band idth i Product 4 20 P 20 t V Gai V = 2.4V DD 2 10 Outpu 0 0 0.1 -50 -25 0 25 50 75 100 125 100 1000 10000 100000 1000000 10000000 100 1k 10k 100k 1M 10M Ambient Temperature (°C) Frequency (Hz) FIGURE 2-19:
Gain Bandwidth Product,
FIGURE 2-22:
Output Voltage Swing vs. Phase Margin vs. Ambient Temperature. Frequency.
14 70 1000 12 60 V = 2.4V DD DD 100 10 50 Phase Margin V - V DD - DD OH OH idth Product 8 40 (MHz) 10 6 30 Gain Bandwidth Product hase Margin (°) Bandw ltage Headroom (mV) V - V OL - OL SS SS n P o 4 20 1 Gai V = 5.5V 2 DD 10 Output V 0 0 0.1 -50 -25 0 25 50 75 100 125 0.01 0.1 1 10 Ambient Temperature (°C) Output Current (mA) FIGURE 2-20:
Gain Bandwidth Product,
FIGURE 2-23:
Output Voltage Headroom Phase Margin vs. Ambient Temperature. vs. Output Current.
60 1000 50 -40°C V = 5.5V 40 +25°C DD 30 +85°C 100 +125°C V - V DD OH 20 10 0 10 V - V (mA) OL SS -10 hort Circuit Current -20 oltage Headroom (mV) S +125 12 ° 5 C V -30 +85°C 1 -40 +25°C Output -40°C -50 Output -60 0.1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.01 0.1 1 10 100 Power Supply Voltage (V) Output Current (mA) FIGURE 2-21:
Output Short Circuit Current
FIGURE 2-24:
Output Voltage Headroom vs. Power Supply Voltage. vs. Output Current. DS20002321C-page 10  2012-2013 Microchip Technology Inc. Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications 1.3 Test Circuits 2.0 Typical Performance Curves Figure 2-1: Input Offset Voltage Figure 2-2: Input Offset Voltage Drift Figure 2-3: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-4: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-5: Input Offset Voltage vs. Output Voltage Figure 2-6: Input Offset Voltage vs. Power Supply Voltage FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6491/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6492/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. Figure 4-3: Protecting the Analog Inputs 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps Figure 4-6: Unused Op Amps. Figure 4-7: Example Guard Ring Layout for Inverting Gain 4.6 PCB Surface Leakage 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service