Datasheet MCP6H91, MCP6H92, MCP6H94 (Microchip) - 4

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MCP6H91/2/4 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics
: Unless otherwise indicated, VDD = +3.5V to +12V, VSS = GND, TA = +25°C, V  CM = VDD/2 - 1.4V, VOUT VDD/2, VL = VDD/2 and RL = 10 kto VL. (Refer to Figure 1-1).
Parameters Sym. Min. Typ. Max. Units Conditions Output
High-Level Output Voltage VOH 3.490 3.495 — V VDD = 3.5V 0.5V input overdrive 4.985 4.993 — V VDD = 5V 0.5V input overdrive 11.970 11.980 — V VDD = 12V 0.5V input overdrive Low-Level Output Voltage VOL — 0.005 0.010 V VDD = 3.5V 0.5 V input overdrive — 0.007 0.015 V VDD = 5V 0.5 V input overdrive — 0.020 0.030 V VDD = 12V 0.5 V input overdrive Output Short-Circuit Current ISC — ±35 — mA VDD = 3.5V — ±41 — mA VDD = 5V — ±41 — mA VDD = 12V
Power Supply
Supply Voltage VDD 3.5 — 12 V Single-Supply operation ±1.75 — ±6 V Dual-Supply operation Quiescent Current per Amplifier IQ — 2 2.8 mA IO = 0, VCM = VDD/4
AC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +3.5V to +12V, VSS = GND, V  CM = VDD/2 - 1.4V, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters Sym. Min. Typ. Max. Units Conditions AC Response
Gain Bandwidth Product GBWP — 10 — MHz Phase Margin PM — 60 — °C G = +1V/V Slew Rate SR — 10 — V/µs
Noise
Input Noise Voltage Eni — 10 — µVp-p f = 0.1 Hz to 10 Hz Input Noise Voltage Density Eni — 23 — nV/Hz f = 1 kHz — 12 — nV/Hz f = 10 kHz Input Noise Current Density ini — 1.9 — fA/Hz f = 1 kHz DS25138B-page 4  2012 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-13: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-14: Quiescent Current vs. Ambient Temperature. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage. FIGURE 2-16: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-19: Channel-to-Channel Separation vs. Frequency (MCP6H92 only). FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Output Current. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-29: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-30: Slew Rate vs. Ambient Temperature. FIGURE 2-31: Slew Rate vs. Ambient Temperature. FIGURE 2-32: Small Signal Non-Inverting Pulse Response. FIGURE 2-33: Small Signal Inverting Pulse Response. FIGURE 2-34: Large Signal Non-Inverting Pulse Response. FIGURE 2-35: Large Signal Inverting Pulse Response. FIGURE 2-36: The MCP6H91/2/4 Shows No Phase Reversal. FIGURE 2-37: Closed Loop Output Impedance vs. Frequency. FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps 4.6 PCB Surface Leakage FIGURE 4-6: Unused Op Amps. FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-8: High Side Current Sensing Using Difference Amplifier. FIGURE 4-9: Active Full-Wave Rectifier. FIGURE 4-10: Non-Inverting Integrator. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service