Datasheet MCP6H91, MCP6H92, MCP6H94 (Microchip) - 9

MCP6H91/2/4 Note:
Unless otherwise indicated, T  A = +25°C, VDD = +3.5V to +12V, VSS = GND, VCM = VDD/2 - 1.4V, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF.
100000 100n 120 0 T = +125°C Open-Loop Gain A 100 -30 10000 (A) 10n (°) 80 -60 Open-Loop Phase 1000 1n 60 -90 Current 100 100p 40 -120 T = +85°C A 20 -150 10 Input Bias 10p V = 12 V Open Loop Gain (dB) Open Loop Phase DD 0 -180 1 1p -20 -210 1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 0 2 4 6 8 10 12 1 10 100 1k 10k 100k 1M 10M 100M Common Mode Input Voltage (V) Frequency (Hz) FIGURE 2-13:
Input Bias Current vs.
FIGURE 2-16:
Open-Loop Gain, Phase vs. Common Mode Input Voltage. Frequency.
2.5 180 2.4 2.3 160 V = 12V 2.2 DD V = 5V DD 2.1 V = 3.5V 140 DD 2.0 1.9 120 (mA/Amplifier) 1.8 Quiescent Current 1.7 100 V + 0.2V < V < V - 0.2V SS OUT DD 1.6 DC Open-Loop Gain (dB) 1.5 80 -50 -25 0 25 50 75 100 125 3 5 7 9 11 13 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
DC Open-Loop Gain vs. Ambient Temperature. Power Supply Voltage.
3.0 160 2.5 140 120 2.0 V = 12V 100 DD 1.5 V = 5V DD V = 3.5V DD 80 1.0 T = +125°C (mA/Amplifier) A T = +85°C Quiescent Current A 60 T = +25°C 0.5 A DC Open-Loop Gain (dB) T = -40°C A 40 0.0 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0 2 4 6 8 10 12 Output Voltage Headroom (V) Power Supply Voltage (V) V - V or V - V DD OH OL SS FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs. Power Supply Voltage. Output Voltage Headroom.  2012 Microchip Technology Inc. DS25138B-page 9 Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-13: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-14: Quiescent Current vs. Ambient Temperature. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage. FIGURE 2-16: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-19: Channel-to-Channel Separation vs. Frequency (MCP6H92 only). FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Output Current. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-29: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-30: Slew Rate vs. Ambient Temperature. FIGURE 2-31: Slew Rate vs. Ambient Temperature. FIGURE 2-32: Small Signal Non-Inverting Pulse Response. FIGURE 2-33: Small Signal Inverting Pulse Response. FIGURE 2-34: Large Signal Non-Inverting Pulse Response. FIGURE 2-35: Large Signal Inverting Pulse Response. FIGURE 2-36: The MCP6H91/2/4 Shows No Phase Reversal. FIGURE 2-37: Closed Loop Output Impedance vs. Frequency. FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps 4.6 PCB Surface Leakage FIGURE 4-6: Unused Op Amps. FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-8: High Side Current Sensing Using Difference Amplifier. FIGURE 4-9: Active Full-Wave Rectifier. FIGURE 4-10: Non-Inverting Integrator. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service