Datasheet MCP660, MCP661, MCP662, MCP663, MCP664, MCP665, MCP669 (Microchip) - 7

MCP660/1/2/3/4/5/9 2.0 TYPICAL PERFORMANCE CURVES Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, TA = +25°C, VDD = +2.5V to 5.5V, VSS = GND, VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 1 kto VL, CL = 20 pF and CS = VSS.
2.1 DC Signal Inputs 22% 1.4
Representative Part
20% ) ces
100 Samples TA = +25°C
V 1.3 n 18%
VDD = 2.5V and 5.5V
(m rre 16% 1.2 e cu 14%
V
c 1.1 ltag
DD = 5.5V
12% o f O V 1.0 o 10% e g 8% 0.9 ffset ta 6% en t O 0.8 4% u
V
rc p
DD = 2.5V
e In 0.7 P 2% 0% 0.6 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Input Offset Voltage (mV) Output Voltage (V) FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage vs. Output Voltage.
24% 0.0 22%
1 Lot
ces
100 Samples V
20%
DD = 2.5V and 5.5V Low (VCMR_L – VSS) T
) 18%
A = -40°C to +125°C
-0.1 V rren on ( 16% m cu c m 14% o -0.2 room
V
f O 12%
DD = 2.5V
t C o u e 10% ead g -0.3 8% H ta Inp 6% de
V
en o
DD = 5.5V
Low -0.4 rc 4% M e P 2% 0% -0.5 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 -50 -25 0 25 50 75 100 125 Input Offset Voltage Drift (µV/°C) Ambient Temperature (°C) FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5:
Low-Input Common-Mode Voltage Headroom vs. Ambient Temperature.
0.0 1.4
Representative Part 1 Lot
) -0.2 V
V High (V – V ) CM = VSS DD CMR_H
-0.4 ) (m n e 1.3 -0.6 (V mmo ltag -0.8 o
V
o room
DD = 2.5V
V -1.0 t C ad 1.2 u e -1.2 p ffset n
+125°C
I H -1.4 de t O
+85°C
gh o u 1.1 -1.6
+25°C
p Hi M
VDD = 5.5V
In
-40°C
-1.8 -2.0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 -50 -25 0 25 50 75 100 125 Power Supply Voltage (V) Ambient Temperature (°C) FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
High-Input Common-Mode Power Supply Voltage with VCM = 0V. Voltage Headroom vs. Ambient Temperature.  2009-2014 Microchip Technology Inc. DS20002194E-page 7 Document Outline 60 MHz, 32 V/µs Rail-to-Rail Output (RRO) Op Amps Features: Typical Applications: Design Aids: Description: Typical Application Circuit High Gain-Bandwidth Op Amp Portfolio Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications DC Electrical Specifications AC Electrical Specifications Digital Electrical Specifications Temperature Specifications 1.3 Timing Diagram FIGURE 1-1: Timing Diagram. 1.4 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves 2.1 DC Signal Inputs FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Power Supply Voltage with VCM = 0V. FIGURE 2-4: Input Offset Voltage vs. Output Voltage. FIGURE 2-5: Low-Input Common-Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-6: High-Input Common-Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-7: Input Offset Voltage vs. Common-Mode Voltage with VDD = 2.5V. FIGURE 2-8: Input Offset Voltage vs. Common-Mode Voltage with VDD = 5.5V. FIGURE 2-9: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-10: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-11: DC Open-Loop Gain vs. Load Resistance. FIGURE 2-12: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-13: Input Bias Current vs. Input Voltage (below VSS). FIGURE 2-14: Input Bias and Offset Currents vs. Common-Mode Input Voltage with TA = +85°C. FIGURE 2-15: Input Bias and Offset Currents vs. Common-Mode Input Voltage with TA = +125°C. 2.2 Other DC Voltages and Currents FIGURE 2-16: Output Voltage Headroom vs. Output Current. FIGURE 2-17: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-18: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-19: Supply Current vs. Power Supply Voltage. FIGURE 2-20: Supply Current vs. Common-Mode Input Voltage. 2.3 Frequency Response FIGURE 2-21: CMRR and PSRR vs. Frequency. FIGURE 2-22: Open-Loop Gain vs. Frequency. FIGURE 2-23: Gain-Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-24: Gain-Bandwidth Product and Phase Margin vs. Common-Mode Input Voltage. FIGURE 2-25: Gain-Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-26: Closed-Loop Output Impedance vs. Frequency. FIGURE 2-27: Gain Peaking vs. Normalized Capacitive Load. FIGURE 2-28: Channel-to-Channel Separation vs. Frequency. 2.4 Noise and Distortion FIGURE 2-29: Input Noise Voltage Density vs. Frequency. FIGURE 2-30: Input Noise Voltage Density vs. Input Common-Mode Voltage with f = 100 Hz. FIGURE 2-31: Input Noise Voltage Density vs. Input Common-Mode Voltage with f = 1 MHz. FIGURE 2-32: Input Noise vs. Time with 0.1 Hz Filter. FIGURE 2-33: THD+N vs. Frequency. FIGURE 2-34: Change in Gain Magnitude and Phase vs. DC Input Voltage. 2.5 Time Response FIGURE 2-35: Non-Inverting Small Signal Step Response. FIGURE 2-36: Non-Inverting Large Signal Step Response. FIGURE 2-37: Inverting Small Signal Step Response. FIGURE 2-38: Inverting Large Signal Step Response. FIGURE 2-39: The MCP660/1/2/3/4/5/9 Family Shows No Input Phase Reversal with Overdrive. FIGURE 2-40: Slew Rate vs. Ambient Temperature. FIGURE 2-41: Maximum Output Voltage Swing vs. Frequency. 2.6 Chip Select Response FIGURE 2-42: CS Current vs. Power Supply Voltage. FIGURE 2-43: CS and Output Voltages vs. Time with VDD = 2.5V. FIGURE 2-44: CS and Output Voltages vs. Time with VDD = 5.5V. FIGURE 2-45: CS Hysteresis vs. Ambient Temperature. FIGURE 2-46: CS Turn-On Time vs. Ambient Temperature. FIGURE 2-47: CS’s Pull-Down Resistor (RPD) vs. Ambient Temperature. FIGURE 2-48: Quiescent Current in Shutdown vs. Power Supply Voltage. FIGURE 2-49: Output Leakage Current vs. Output Voltage. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Chip Select Digital Input (CS) 3.5 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Unity-Gain Voltage Limitations for Linear Operation. 4.2 Rail-to-Rail Output FIGURE 4-4: Output Current. FIGURE 4-5: Diagram for Power Calculations. 4.3 Distortion 4.4 Improving Stability FIGURE 4-6: Output Resistor, RISO, Stabilizes Large Capacitive Loads. FIGURE 4-7: Recommended RISO Values for Capacitive Loads. FIGURE 4-8: Amplifier with Parasitic Capacitance. FIGURE 4-9: Maximum Recommended RF vs. Gain. 4.5 MCP663 and MCP665 Chip Select 4.6 Power Supply 4.7 High Speed PCB Layout 4.8 Typical Applications FIGURE 4-10: 50W Line Driver. FIGURE 4-11: Transimpedance Amplifier for an Optical Detector. FIGURE 4-12: H-Bridge Driver. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Design and Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service