Datasheet AD7617 (Analog Devices)

16-Channel DAS with 14-Bit, Bipolar Input, Dual Simultaneous Sampling ADC Data Sheet AD7617 FEATURES APPLICATIONS 16-channel, dual, simultaneously sampled inputs Power line monitoring Independently selectable channel input ranges Protective relays True bipolar: ±10 V, ±5 V, ±2.5 V Multiphase motor control Single 5 V analog supply and 2.3 V to 3.6 V VDRIVE supply Instrumentation and control systems Fully integrated data acquisition solution Data acquisition systems (DASs) Analog input clamp protection GENERAL DESCRIPTION Input buffer with 1 MΩ analog input impedance
The AD7617 is a 14-bit, DAS that supports dual simultaneous
First-order antialiasing analog filter
sampling of 16 channels. The AD7617 operates from a single +5 V
On-chip accurate reference and reference buffer
supply and can accommodate ±10 V, ±5 V, and ±2.5 V true bipolar
Dual 14-bit SAR ADC
input signals while sampling at throughput rates up to 1 MSPS
Throughput rate: 2× 1 MSPS per channel pair
per channel pair with 85 dB signal-to-noise ratio (SNR). Higher
Oversampling capability with digital filter
SNR performance can be achieved with the on-chip oversampling
Flexible sequencer with burst mode
mode (85.3 dB for an oversampling ratio (OSR) of 2).
Flexible parallel/serial interface SPI/QSPI/MICROWIRE/DSP compatible
The input clamp protection circuitry can tolerate voltages up to
Optional CRC error checking
±21 V. The AD7617 has 1 MΩ analog input impedance, regardless
Hardware/software configuration
of sampling frequency. The single-supply operation, on-chip
Performance
filtering, and high input impedance eliminate the need for
85.3 dB typical SNR at 500 kSPS (2× oversampling)
driver op amps and external bipolar supplies.
85 dB typical SNR at 1 MSPS
The device contains analog input clamp protection, a dual, 14-bit
−103 dB typical THD at ±10 V range
charge redistribution successive approximation register (SAR)
±0.3 LSB INL (typical), ±0.99 LSB DNL (maximum)
analog-to-digital converter (ADC), a flexible digital filter, a
8 kV ESD analog input pins only
2.5 V reference and reference buffer, and high speed serial and
On-chip self detect function
parallel interfaces. The AD7617 is serial peripheral interface
80-lead LQFP package
(SPI)/QSPI™/DSP/MICROWIRE compatible.
FUNCTIONAL BLOCK DIAGRAM VCC REFCAP REFINOUT REFSEL REGCAP REGCAPD VDRIVE 1MΩ R V0A FB CLAMP 2.5V 1.8V 1.8V REF ALDO DLDO V0AGND FIRST- CLAMP 1MΩ RFB ORDER LPF 9:1 MUX 1MΩ R SERIAL FB SDOx/SDI V7A CLAMP V7AGND FIRST- 14-BIT CLAMP ORDER LPF SER/PAR SAR OSR 1MΩ RFB DIGITAL SER1W 1MΩ R FILTER FB V0B 14-BIT CLAMP SAR PARALLEL DB15 TO DB0 FIRST- V0BGND CLAMP 1MΩ RFB ORDER LPF OS2 TO OS0 9:1 1MΩ R MUX FB V7B RESET CLAMP FIRST- V7BGND FLEXIBLE BURST CLAMP 1MΩ RFB ORDER LPF SEQUENCER SEQEN CONTROL HW_RNGSEL0, HW_RNGSEL1 INPUTS CHSEL2 TO CHSEL0 AD7617 VCC 2:1 CLK OSC BUSY ALDO MUX CONVST AGND DGND NOTES
1
1. MULTIFUNCTION PINS, SUCH AS DB15/OS2, ARE REFERRED TO BY A SINGLE FUNCTION OF THE PIN,
0 -0
FOR EXAMPLE, DB15, WHEN ONLY THAT FUNCTION IS RELEVANT. REFER TO THE PIN CONFIGURATION
77
AND FUNCTION DESCRIPTIONS SECTION FOR MORE INFORMATION.
60 1 Figure 1. AD7617 Functional Block Diagram
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Universal Timing Specifications Parallel Mode Timing Specifications Serial Mode Timing Specifications ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Channel Selection Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE SHUTDOWN MODE DIGITAL FILTER APPLICATIONS INFORMATION FUNCTIONALITY OVERVIEW POWER SUPPLIES TYPICAL CONNECTIONS DEVICE CONFIGURATION OPERATIONAL MODE INTERNAL/EXTERNAL REFERENCE DIGITAL INTERFACE HARDWARE MODE SOFTWARE MODE RESET FUNCTIONALITY PIN FUNCTION OVERVIEW DIGITAL INTERFACE CHANNEL SELECTION Hardware Mode Software Mode PARALLEL INTERFACE Reading Conversion Results Writing Register Data Reading Register Data SERIAL INTERFACE Reading Conversion Results Writing Register Data Reading Register Data SEQUENCER HARDWARE MODE SEQUENCER SOFTWARE MODE SEQUENCER BURST SEQUENCER Hardware Mode Burst Software Mode Burst DIAGNOSTICS DIAGNOSTIC CHANNELS INTERFACE SELF TEST CRC REGISTER SUMMARY ADDRESSING REGISTERS CONFIGURATION REGISTER CHANNEL REGISTER INPUT RANGE REGISTERS Input Range Register A1 Input Range Register A2 Input Range Register B1 Input Range Register B2 SEQUENCER STACK REGISTERS STATUS REGISTER OUTLINE DIMENSIONS ORDERING GUIDE