Datasheet AD7605-4 (Analog Devices)

4-Channel DAS with 16-Bit, Bipolar Input, Simultaneous Sampling ADC Data Sheet AD7605-4 FEATURES GENERAL DESCRIPTION 4 simultaneously sampled inputs
The AD7605-41 is a 4-channel, 16-bit, simultaneous sampling,
True bipolar analog input ranges: ±10 V (maximum),
analog-to-digital data acquisition system (DAS). The device
±5 V (maximum)
contains analog input clamp protection, a second-order antialias-
Single 5 V analog supply and 2.5 V to 5 V VDRIVE (nominal)
ing filter, a track-and-hold amplifier, a 16-bit charge redistribution
Fully integrated data acquisition solution
successive approximation analog-to-digital converter (ADC), a
Analog input clamp protection
2.5 V reference and reference buffer, and high speed serial and
Input buffer with 1 MΩ analog input impedance
paral el interfaces.
Second-order antialiasing analog filter
The AD7605-4 operates from a single 5 V supply and can
On-chip accurate reference and reference buffer
accommodate ±10 V and ±5 V true bipolar input signals while
16-bit ADC with 300 kSPS on all channels
sampling at throughput rates of up to 300 kSPS for all channels.
Flexible parallel/serial interface
The input clamp protection circuitry can tolerate voltages up to
Serial peripheral interface (SPI)/QSPI/MICROWIRE/DSP
±16.5 V. The AD7605-4 has 1 MΩ analog input impedance,
compatible
regardless of sampling frequency. The single-supply operation,
Performance
on-chip filtering, and high input impedance eliminate the need
7 kV ESD rating on analog input pins
for driver op amps and external bipolar supplies.
Standby mode: 25 mW (typical) 64-lead LQFP package
The AD7605-4 is SPI, QSPI™, MICROWIRE™, and digital signal
APPLICATIONS
processor (DSP) compatible.
Power line monitoring and protection systems Table 1. High Resolution, Bipolar Input, Simultaneous Multiphase motor control Sampling DAS Solutions Instrumentation and control systems Resolution Single-Ended True Differential No. of Simultaneous (Bits) Inputs Inputs Sampling Channels Multiaxis positioning systems
18 AD7608 AD7609 8
Data acquisition systems (DAS)
16 AD7606 8 AD7606-6 6 AD7606-4 4 AD7605-4 4 14 AD7607 8
FUNCTIONAL BLOCK DIAGRAM AV AV CC CC REGCAP REGCAP REFCAPB REFCAPA 1MΩ RFB V1 CLAMP 2.5V 2.5V LDO LDO SECOND- T/H V1GND CLAMP 1MΩ R ORDER LPF FB 1MΩ RFB REFIN/REFOUT V2 CLAMP SECOND- T/H V2GND CLAMP 1MΩ R ORDER LPF FB REF SELECT 2.5V REF 1MΩ R AGND FB 4:1 V3 CLAMP MUX DB7/D SECOND- T/H OUTA V3GND CLAMP SERIAL 1MΩ R ORDER LPF FB DB8/DOUTB 1MΩ PARALLEL/ R RD/SCLK FB 16-BIT V4 CLAMP SERIAL SAR INTERFACE CS SECOND- T/H V4GND CLAMP 1MΩ R ORDER LPF FB PAR/SER/BYTE SEL VDRIVE PARALLEL DB0 TO DB15/BYTESEL CLK OSC AD7605-4 BUSY CONTROL INPUTS FRSTDATA
001
AGND CONVST A CONVST B RESET RANGE
13503- Figure 1. 1 Protected by U.S. Patent No. 8,072,360 B2.
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter Track-and-Hold Amplifiers ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE TYPICAL CONNECTION DIAGRAM POWER-DOWN MODES CONVERSION CONTROL Simultaneous Sampling on All Analog Input Channels Simultaneously Sampling Two Sets of Channels APPLICATIONS INFORMATION PARALLEL INTERFACE (/SER/BYTE SEL = 0) PARALLEL BYTE (/SER/BYTE SEL = 1, DB15/BYTE SEL = 1) SERIAL INTERFACE (/SER/BYTE SEL = 1) READING DURING CONVERSION LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE