AD7605-4* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017COMPARABLE PARTSREFERENCE DESIGNS View a parametric search of comparable parts. • CN0148 EVALUATION KITSREFERENCE MATERIALS • AD7605-4 Evaluation Board Technical Articles • MS-2210: Designing Power Supplies for High Speed ADC DOCUMENTATIONApplication NotesDESIGN RESOURCES • AN-1091: Configuring the AD7606/AD7607 for Slow • AD7605-4 Material Declaration Supply Ramp Conditions • PCN-PDN Information Data Sheet • Quality And Reliability • AD7605-4: 4-Channel DAS with 16-Bit, Bipolar Input, • Symbols and Footprints Simultaneous Sampling ADC Data Sheet User GuidesDISCUSSIONS • UG-851: Evaluating the AD7606/AD7606-6/AD7606-4/ View all AD7605-4 EngineerZone Discussions. AD7607/AD7608 and AD7605-4 16-Bit Simultaneous Sampling, 8-/6-/4-Channel, SAR ADC SAMPLE AND BUYSOFTWARE AND SYSTEMS REQUIREMENTS Visit the product page to see pricing options. • CED1Z FPGA Project for AD7606 with Nios driver TECHNICAL SUPPORTTOOLS AND SIMULATIONS Submit a technical question or find your regional support number. • AD7605-4 IBIS Model DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter Track-and-Hold Amplifiers ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE TYPICAL CONNECTION DIAGRAM POWER-DOWN MODES CONVERSION CONTROL Simultaneous Sampling on All Analog Input Channels Simultaneously Sampling Two Sets of Channels APPLICATIONS INFORMATION PARALLEL INTERFACE (/SER/BYTE SEL = 0) PARALLEL BYTE (/SER/BYTE SEL = 1, DB15/BYTE SEL = 1) SERIAL INTERFACE (/SER/BYTE SEL = 1) READING DURING CONVERSION LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE