link to page 5 Data SheetAD7605-4SPECIFICATIONS VREF = 2.5 V external/internal, AVCC = 4.75 V to 5.25 V, VDRIVE = 2.3 V to 5.25 V, fSAMPLE = 300 kSPS, TA = TMIN to TMAX, unless otherwise noted. Table 2. ParameterTest Conditions/CommentsMinTypMaxUnit DYNAMIC PERFORMANCE fIN = 1 kHz sine wave, unless otherwise noted Signal-to-Noise Ratio (SNR) ±10 V range 86.5 90 dB ±5 V range 86 89 dB Signal-to-(Noise + Distortion) (SINAD) ±10 V range 86.5 90 dB Ratio ±5 V range 86 89 dB Dynamic Range ±10 V range 90.5 dB ±5 V range 90 dB Total Harmonic Distortion (THD) −107 −95 dB Spurious-Free Dynamic Range (SFDR) −108 dB Intermodulation Distortion (IMD) fa = 1 kHz, fb = 1.1 kHz Second-Order Terms −110 dB Third-Order Terms −106 dB Channel-to-Channel Isolation fIN on unselected channels up to 160 kHz −95 dB ANALOG INPUT FILTER Full Power Bandwidth −3 dB, ±10 V range 23 kHz −3 dB, ±5 V range 15 kHz −0.1 dB, ±10 V range 10 kHz −0.1 dB, ±5 V range 5 kHz tGROUP DELAY ±10 V range 11 µs ±5 V range 15 µs DC ACCURACY Resolution No missing codes 16 Bits Differential Nonlinearity ±0.5 ±0.99 LSB1 Integral Nonlinearity ±0.5 ±2 LSB Total Unadjusted Error (TUE) ±10 V range ±6 LSB ±5 V range ±12 LSB Positive Full-Scale (PFS) Error External reference ±8 ±32 LSB Internal reference ±8 LSB Drift External reference ±2 ppm/°C Internal reference ±7 ppm/°C Matching ±10 V range 5 32 LSB ±5 V range 16 40 LSB Bipolar Zero Code Error ±10 V range ±1 ±6 LSB ±5 V range ±3 ±12 LSB Drift ±10 V range 10 µV/°C ±5 V range 5 µV/°C Matching ±10 V range 1 8 LSB ±5 V range 6 22 LSB Negative Full-Scale (NFS) Error External reference ±8 ±32 LSB Internal reference ±8 LSB Drift External reference ±4 ppm/°C Internal reference ±8 ppm/°C Matching ±10 V range 5 32 LSB ±5 V range 16 40 LSB Rev. 0 | Page 3 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter Track-and-Hold Amplifiers ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE TYPICAL CONNECTION DIAGRAM POWER-DOWN MODES CONVERSION CONTROL Simultaneous Sampling on All Analog Input Channels Simultaneously Sampling Two Sets of Channels APPLICATIONS INFORMATION PARALLEL INTERFACE (/SER/BYTE SEL = 0) PARALLEL BYTE (/SER/BYTE SEL = 1, DB15/BYTE SEL = 1) SERIAL INTERFACE (/SER/BYTE SEL = 1) READING DURING CONVERSION LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE