Datasheet ADA4312-1 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | Wideband, Differential, High Output Current Line Driver with Shutdown |
| 页数 / 页 | 13 / 4 — Data Sheet. ADA4312-1. SPECIFICATIONS. Table 1. Parameter. Test … |
| 修订版 | A |
| 文件格式/大小 | PDF / 479 Kb |
| 文件语言 | 英语 |
Data Sheet. ADA4312-1. SPECIFICATIONS. Table 1. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit
文件文字版本
Data Sheet ADA4312-1 SPECIFICATIONS
V 1 CC = 12 V, VEE = GND, RF = 732 Ω, RIADJ = 0 Ω (at TA = 25°C, GDIFF = +16 V/V, RL, DIFF = 40 Ω, SD = 0 V), unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth V = 0.2 V p-p differential 195 MHz OUT Full Power Bandwidth V = 5 V p-p differential 168 MHz OUT Slew Rate V = 4 V p-p differential, G = +2 V/V 2100 V/µs OUT DIFF NOISE/DISTORTION PERFORMANCE G.hn Multitone Power Ratio (MTPR) V = 16 dBm line power OUT f = 5 MHz, referred to −58 dBm/Hz −64 dBc C f = 17 MHz, referred to −58 dBm/Hz −64 dBc C f = 28 MHz, referred to −58 dBm/Hz −64 dBc C f = 31 MHz, referred to −58 dBm/Hz −63 dBc C f = 59 MHz, referred to −58 dBm/Hz −61 dBc C f = 82 MHz, referred to −58 dBm/Hz −62 dBc C Differential Output Voltage Noise f = 10 MHz 57 nV/√Hz DC PERFORMANCE Differential Input Offset Voltage −1.2 +1.2 mV Input Bias Current Noninverting Input −20 +20 µA Inverting Input −175 +175 µA Open-Loop Transimpedance 47 kΩ Common-Mode Rejection Ratio (CMRR) −70 dB OUTPUT CHARACTERISTICS Positive Swing 10.4 10.5 V peak Negative Swing 1.5 1.6 V peak Differential Swing 17.6 18 V p-p Peak Output Current Drive 225 mA peak Differential Output Impedance2 Disabled (SD ≥ 2.0 V) 10 kΩ Disabled Output Voltage SD ≥ 2.0 V, referred to V ±15 mV MID POWER SUPPLY Single-Supply Voltage 12 V Supply Current SD ≤ 0.8 V 46 49.5 mA SD ≥ 2.0 V 3 4 mA SHUTDOWN PIN High Level Input Voltage, V Referenced to GND 2.0 V IH Low Level Input Voltage, V Referenced to GND 0.8 V IL SD = Low Bias Current SD = 0.8 V −30 −20 µA SD = High Bias Current SD = 2.0 V −15 −9 µA Enable Time 1 µs Disable Time 1 µs Power Supply Rejection Ratio (PSRR) −70 dB 1 RIADJ is the resistor that must be installed between IADJ (Pin 5) and GND (Pin 4). 2 Differential output impedance is measured open-loop. Rev. A | Page 3 of 12 Document Outline Features Applications General Description Functional Block Diagram Typical Application Circuit Revision History Specifications Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Applications Information Feedback Resistor Selection General Operation Half-Duplex Operation Establishing VMID Bias Control and Linearity PCB Layout Thermal Management Power Supply Bypassing Evaluation Board Outline Dimensions Ordering Guide
V 1 CC = 12 V, VEE = GND, RF = 732 Ω, RIADJ = 0 Ω (at TA = 25°C, GDIFF = +16 V/V, RL, DIFF = 40 Ω, SD = 0 V), unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth V = 0.2 V p-p differential 195 MHz OUT Full Power Bandwidth V = 5 V p-p differential 168 MHz OUT Slew Rate V = 4 V p-p differential, G = +2 V/V 2100 V/µs OUT DIFF NOISE/DISTORTION PERFORMANCE G.hn Multitone Power Ratio (MTPR) V = 16 dBm line power OUT f = 5 MHz, referred to −58 dBm/Hz −64 dBc C f = 17 MHz, referred to −58 dBm/Hz −64 dBc C f = 28 MHz, referred to −58 dBm/Hz −64 dBc C f = 31 MHz, referred to −58 dBm/Hz −63 dBc C f = 59 MHz, referred to −58 dBm/Hz −61 dBc C f = 82 MHz, referred to −58 dBm/Hz −62 dBc C Differential Output Voltage Noise f = 10 MHz 57 nV/√Hz DC PERFORMANCE Differential Input Offset Voltage −1.2 +1.2 mV Input Bias Current Noninverting Input −20 +20 µA Inverting Input −175 +175 µA Open-Loop Transimpedance 47 kΩ Common-Mode Rejection Ratio (CMRR) −70 dB OUTPUT CHARACTERISTICS Positive Swing 10.4 10.5 V peak Negative Swing 1.5 1.6 V peak Differential Swing 17.6 18 V p-p Peak Output Current Drive 225 mA peak Differential Output Impedance2 Disabled (SD ≥ 2.0 V) 10 kΩ Disabled Output Voltage SD ≥ 2.0 V, referred to V ±15 mV MID POWER SUPPLY Single-Supply Voltage 12 V Supply Current SD ≤ 0.8 V 46 49.5 mA SD ≥ 2.0 V 3 4 mA SHUTDOWN PIN High Level Input Voltage, V Referenced to GND 2.0 V IH Low Level Input Voltage, V Referenced to GND 0.8 V IL SD = Low Bias Current SD = 0.8 V −30 −20 µA SD = High Bias Current SD = 2.0 V −15 −9 µA Enable Time 1 µs Disable Time 1 µs Power Supply Rejection Ratio (PSRR) −70 dB 1 RIADJ is the resistor that must be installed between IADJ (Pin 5) and GND (Pin 4). 2 Differential output impedance is measured open-loop. Rev. A | Page 3 of 12 Document Outline Features Applications General Description Functional Block Diagram Typical Application Circuit Revision History Specifications Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Applications Information Feedback Resistor Selection General Operation Half-Duplex Operation Establishing VMID Bias Control and Linearity PCB Layout Thermal Management Power Supply Bypassing Evaluation Board Outline Dimensions Ordering Guide