Datasheet ADA4092-4 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | Micropower, OVP, RRIO, Quad Op Amp |
| 页数 / 页 | 21 / 8 — ADA4092-4. TYPICAL PERFORMANCE CHARACTERISTICS. 180. 160. SY = ±1.5V. A = … |
| 修订版 | B |
| 文件格式/大小 | PDF / 664 Kb |
| 文件语言 | 英语 |
ADA4092-4. TYPICAL PERFORMANCE CHARACTERISTICS. 180. 160. SY = ±1.5V. A = 25°C. 140. S 30. S 120. ART. LIFIE. 100. M A 20. R O. R O 15. NUM. NUM 10. 200
文件文字版本
ADA4092-4 TYPICAL PERFORMANCE CHARACTERISTICS 180 40 ADA4092-4 160 ADA4092-4 35 V V SY = ±1.5V SY = ±1.5V T T A = 25°C 140 A = 25°C S 30 R S 120 25 ART LIFIE P P 100 F M A 20 R O F 80 BE R O 15 60 BE NUM NUM 10 40 20 5 0 0 0 –2 –1 0 1 2 3 4 5 6 7 8
005
200 400 600 800 –800 –600 –400 –200 1000 1200
002
TCV –1200 –1000 OS (μV/°C)
08803-
OFFSET VOLTAGE (µV)
08803- Figure 2. Input Offset Voltage Distribution, 3 V Figure 5. TCVOS Distribution, 3 V
180 70 ADA4092-4 160 ADA4092-4 V V 60 SY = ±5V SY = ±5V T T A = 25°C 140 A = 25°C S R 50 S 120 ART LIFIE P P 100 40 F M A R O F 80 30 BE R O 60 BE NUM 20 NUM 40 10 20 0 0 0 –2 –1 0 1 2 3 4 5 6 7 8
006
200 400 600 800 –800 –600 –400 –200 1000 1200
003
TCV –1200 –1000 OS (μV/°C)
08803-
OFFSET VOLTAGE (µV)
08803- Figure 3. Input Offset Voltage Distribution, 10 V Figure 6. TCVOS Distribution, 10 V
180 70 ADA4092-4 160 ADA4092-4 V V 60 SY = ±15V SY = ±15V T T A = 25°C 140 A = 25°C S R 50 S 120 ART LIFIE P P 100 40 F M A F R O 80 30 BE R O 60 BE NUM 20 NUM 40 10 20 0 0 –2 –1 0 1 2 3 4 5 6 7 8
007
200 400 600 800 –800 –600 –400 –200 1000 1200
004
TCV –1200 –1000 OS (μV/°C)
08803-
OFFSET VOLTAGE (µV)
08803- Figure 4. Input Offset Voltage Distribution, 30 V Figure 7. TCVOS Distribution, 30 V Rev. B | Page 7 of 20 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Electrical Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Theory of Operation Input Stage Output Stage Input Overvoltage Protection Comparator Operation Outline Dimensions Ordering Guide
005
200 400 600 800 –800 –600 –400 –200 1000 1200
002
TCV –1200 –1000 OS (μV/°C)
08803-
OFFSET VOLTAGE (µV)
08803- Figure 2. Input Offset Voltage Distribution, 3 V Figure 5. TCVOS Distribution, 3 V
180 70 ADA4092-4 160 ADA4092-4 V V 60 SY = ±5V SY = ±5V T T A = 25°C 140 A = 25°C S R 50 S 120 ART LIFIE P P 100 40 F M A R O F 80 30 BE R O 60 BE NUM 20 NUM 40 10 20 0 0 0 –2 –1 0 1 2 3 4 5 6 7 8
006
200 400 600 800 –800 –600 –400 –200 1000 1200
003
TCV –1200 –1000 OS (μV/°C)
08803-
OFFSET VOLTAGE (µV)
08803- Figure 3. Input Offset Voltage Distribution, 10 V Figure 6. TCVOS Distribution, 10 V
180 70 ADA4092-4 160 ADA4092-4 V V 60 SY = ±15V SY = ±15V T T A = 25°C 140 A = 25°C S R 50 S 120 ART LIFIE P P 100 40 F M A F R O 80 30 BE R O 60 BE NUM 20 NUM 40 10 20 0 0 –2 –1 0 1 2 3 4 5 6 7 8
007
200 400 600 800 –800 –600 –400 –200 1000 1200
004
TCV –1200 –1000 OS (μV/°C)
08803-
OFFSET VOLTAGE (µV)
08803- Figure 4. Input Offset Voltage Distribution, 30 V Figure 7. TCVOS Distribution, 30 V Rev. B | Page 7 of 20 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Electrical Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Theory of Operation Input Stage Output Stage Input Overvoltage Protection Comparator Operation Outline Dimensions Ordering Guide