Datasheet ADA4817-1, ADA4817-2 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Dual, Low Noise, 1 GHz FastFET Op Amplifier |
| 页数 / 页 | 25 / 10 — ADA4817-1/ADA4817-2. Data Sheet. 0.15. DUAL, C. F = 0.5pF. SINGLE, NO C. … |
| 修订版 | G |
| 文件格式/大小 | PDF / 632 Kb |
| 文件语言 | 英语 |
ADA4817-1/ADA4817-2. Data Sheet. 0.15. DUAL, C. F = 0.5pF. SINGLE, NO C. 0.10. SINGLE. 0.05. TP –0.05. DUAL. –0.10. G = 2. S = 5V. –0.15
文件文字版本
ADA4817-1/ADA4817-2 Data Sheet 0.15 0.15 DUAL, C DUAL, C F = 0.5pF F = 0.5pF SINGLE, NO C SINGLE, NO C F F 0.10 0.10 ) SINGLE ) SINGLE V V ( 0.05 ( E 0.05 E G G A A LT LT O 0 O 0 V V T T U U TP –0.05 TP –0.05 OU DUAL OU DUAL –0.10 –0.10
18 21 0 0
V
6-
G = 2 S = 5V
6- 75
G = 2
75
–0.15
07
–0.15
07
TIME (5ns/DIV) TIME (5ns/DIV)
Figure 20. Small Signal Transient Response Figure 23. Small Signal Transient Response
1.5 0.075 1.0 0.050 ) V ( 0.5 V) E 0.025 G E ( A G A LT T O 0 L V 0 T VO U T TP –0.5 PU T OU –0.025 SINGLE,SOIC U R O DUAL, LFCSP F = 0Ω DUAL, LFCSP R R –1.0 L = 100Ω F = 0Ω SINGLE, LFCSP VS = ±5V –0.050 RL = 100Ω
24 0
G = +1 VS = ±5V
6-
SINGLE, LFCSP
22 75 0
G = +1
6-
SINGLE, SOIC –1.5
07 75
–0.075
07
TIME (5ns/DIV) TIME (5ns/DIV)
Figure 21. Small Signal Transient Response vs. Package Figure 24. Large Signal Transient Response
6 0.5 SETTLING TIME 2 × VIN 0.4 4 0.3 ) V ( ) 0.2 E 2 % ( AG E 0.1 T M L O TI 0 0 G V N UT LI P –0.1 TT UT –2 V E OUT S O –0.2 –0.3 –4
23
G = 2 –0.4
0 6- 19 0 75
–6
6-
–0.5
07
TIME (10ns/DIV)
75 07
TIME (5ns/DIV)
Figure 22. Output Overdrive Recovery Figure 25. 0.1% Short-Term Settling Time Rev. C | Page 10 of 25 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PADDLE LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE
18 21 0 0
V
6-
G = 2 S = 5V
6- 75
G = 2
75
–0.15
07
–0.15
07
TIME (5ns/DIV) TIME (5ns/DIV)
Figure 20. Small Signal Transient Response Figure 23. Small Signal Transient Response
1.5 0.075 1.0 0.050 ) V ( 0.5 V) E 0.025 G E ( A G A LT T O 0 L V 0 T VO U T TP –0.5 PU T OU –0.025 SINGLE,SOIC U R O DUAL, LFCSP F = 0Ω DUAL, LFCSP R R –1.0 L = 100Ω F = 0Ω SINGLE, LFCSP VS = ±5V –0.050 RL = 100Ω
24 0
G = +1 VS = ±5V
6-
SINGLE, LFCSP
22 75 0
G = +1
6-
SINGLE, SOIC –1.5
07 75
–0.075
07
TIME (5ns/DIV) TIME (5ns/DIV)
Figure 21. Small Signal Transient Response vs. Package Figure 24. Large Signal Transient Response
6 0.5 SETTLING TIME 2 × VIN 0.4 4 0.3 ) V ( ) 0.2 E 2 % ( AG E 0.1 T M L O TI 0 0 G V N UT LI P –0.1 TT UT –2 V E OUT S O –0.2 –0.3 –4
23
G = 2 –0.4
0 6- 19 0 75
–6
6-
–0.5
07
TIME (10ns/DIV)
75 07
TIME (5ns/DIV)
Figure 22. Output Overdrive Recovery Figure 25. 0.1% Short-Term Settling Time Rev. C | Page 10 of 25 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PADDLE LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE