Datasheet AD8033, AD8034 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Low Cost, 80 MHz FastFET Op Amps |
| 页数 / 页 | 24 / 3 — AD8033/AD8034. SPECIFICATIONS. Table 1. Parameter. Conditions. Min. Typ. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 396 Kb |
| 文件语言 | 英语 |
AD8033/AD8034. SPECIFICATIONS. Table 1. Parameter. Conditions. Min. Typ. Max. Unit
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AD8033/AD8034 SPECIFICATIONS
TA = 25°C, VS = ±5 V, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 1. Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, VOUT = 0.2 V p-p 65 80 MHz G = +2, VOUT = 0.2 V p-p 30 MHz G = +2, VOUT = 2 V p-p 21 MHz Input Overdrive Recovery Time −6 V to +6 V input 135 ns Output Overdrive Recovery Time −3 V to +3 V input, G = +2 135 ns Slew Rate (25% to 75%) G = +2, VOUT = 4 V step 55 80 V/μs Settling Time to 0.1% G = +2, VOUT = 2 V step 95 ns G = +2, VOUT = 8 V step 225 ns NOISE/HARMONIC PERFORMANCE Distortion fC = 1 MHz, VOUT = 2 V p-p Second Harmonic RL = 500 Ω −82 dBc RL = 1 kΩ −85 dBc Third Harmonic RL = 500 Ω −70 dBc RL = 1 kΩ −81 dBc Crosstalk, Output-to-Output f = 1 MHz, G = +2 −86 dB Input Voltage Noise f = 100 kHz 11 nV/√Hz Input Current Noise f = 100 kHz 0.7 fA/√Hz DC PERFORMANCE Input Offset Voltage VCM = 0 V 1 2 mV TMIN − TMAX 3.5 mV Input Offset Voltage Match 2.5 mV Input Offset Voltage Drift 4 27 μV/°C Input Bias Current 1.5 11 pA TMIN − TMAX 50 pA Open-Loop Gain VOUT = ± 3 V 89 92 dB INPUT CHARACTERISTICS Common-Mode Input Impedance 1000||2.3 GΩ||pF Differential Input Impedance 1000||1.7 GΩ||pF Input Common-Mode Voltage Range FET Input Range −5.0 to +2.2 V Common-Mode Rejection Ratio VCM = −3 V to +1.5 V −89 −100 dB OUTPUT CHARACTERISTICS Output Voltage Swing ±4.75 ±4.95 V Output Short-Circuit Current 40 mA Capacitive Load Drive 30% overshoot, G = +1, VOUT = 400 mV p-p 35 pF POWER SUPPLY Operating Range 5 24 V Quiescent Current per Amplifier 3.3 3.5 mA Power Supply Rejection Ratio VS = ±2 V −90 −100 dB Rev. D | Page 3 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION OUTPUT SHORT CIRCUIT ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION OUTPUT STAGE DRIVE AND CAPACITIVE LOAD DRIVE INPUT OVERDRIVE INPUT IMPEDANCE THERMAL CONSIDERATIONS LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS BYPASSING GROUNDING LEAKAGE CURRENTS INPUT CAPACITANCE APPLICATIONS INFORMATION HIGH SPEED PEAK DETECTOR ACTIVE FILTERS WIDEBAND PHOTODIODE PREAMP OUTLINE DIMENSIONS ORDERING GUIDE
TA = 25°C, VS = ±5 V, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 1. Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, VOUT = 0.2 V p-p 65 80 MHz G = +2, VOUT = 0.2 V p-p 30 MHz G = +2, VOUT = 2 V p-p 21 MHz Input Overdrive Recovery Time −6 V to +6 V input 135 ns Output Overdrive Recovery Time −3 V to +3 V input, G = +2 135 ns Slew Rate (25% to 75%) G = +2, VOUT = 4 V step 55 80 V/μs Settling Time to 0.1% G = +2, VOUT = 2 V step 95 ns G = +2, VOUT = 8 V step 225 ns NOISE/HARMONIC PERFORMANCE Distortion fC = 1 MHz, VOUT = 2 V p-p Second Harmonic RL = 500 Ω −82 dBc RL = 1 kΩ −85 dBc Third Harmonic RL = 500 Ω −70 dBc RL = 1 kΩ −81 dBc Crosstalk, Output-to-Output f = 1 MHz, G = +2 −86 dB Input Voltage Noise f = 100 kHz 11 nV/√Hz Input Current Noise f = 100 kHz 0.7 fA/√Hz DC PERFORMANCE Input Offset Voltage VCM = 0 V 1 2 mV TMIN − TMAX 3.5 mV Input Offset Voltage Match 2.5 mV Input Offset Voltage Drift 4 27 μV/°C Input Bias Current 1.5 11 pA TMIN − TMAX 50 pA Open-Loop Gain VOUT = ± 3 V 89 92 dB INPUT CHARACTERISTICS Common-Mode Input Impedance 1000||2.3 GΩ||pF Differential Input Impedance 1000||1.7 GΩ||pF Input Common-Mode Voltage Range FET Input Range −5.0 to +2.2 V Common-Mode Rejection Ratio VCM = −3 V to +1.5 V −89 −100 dB OUTPUT CHARACTERISTICS Output Voltage Swing ±4.75 ±4.95 V Output Short-Circuit Current 40 mA Capacitive Load Drive 30% overshoot, G = +1, VOUT = 400 mV p-p 35 pF POWER SUPPLY Operating Range 5 24 V Quiescent Current per Amplifier 3.3 3.5 mA Power Supply Rejection Ratio VS = ±2 V −90 −100 dB Rev. D | Page 3 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION OUTPUT SHORT CIRCUIT ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION OUTPUT STAGE DRIVE AND CAPACITIVE LOAD DRIVE INPUT OVERDRIVE INPUT IMPEDANCE THERMAL CONSIDERATIONS LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS BYPASSING GROUNDING LEAKAGE CURRENTS INPUT CAPACITANCE APPLICATIONS INFORMATION HIGH SPEED PEAK DETECTOR ACTIVE FILTERS WIDEBAND PHOTODIODE PREAMP OUTLINE DIMENSIONS ORDERING GUIDE