Datasheet AD8021 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Low Noise, High Speed Amplifier for 16-Bit Systems |
| 页数 / 页 | 30 / 5 — AD8021. SPECIFICATIONS. Table 1. AD8021AR/AD8021ARM. Parameter … |
| 修订版 | F |
| 文件格式/大小 | PDF / 466 Kb |
| 文件语言 | 英语 |
AD8021. SPECIFICATIONS. Table 1. AD8021AR/AD8021ARM. Parameter Conditions. Min. Typ. Max. Unit
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AD8021
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AD8021 SPECIFICATIONS
VS = ±5 V, @ TA = 25°C, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 1. AD8021AR/AD8021ARM Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth G = +1, CC = 10 pF, VO = 0.05 V p-p 355 490 MHz G = +2, CC = 7 pF, VO = 0.05 V p-p 160 205 MHz G = +5, CC = 2 pF, VO = 0.05 V p-p 150 185 MHz G = +10, CC = 0 pF, VO = 0.05 V p-p 110 150 MHz Slew Rate, 1 V Step G = +1, CC = 10 pF 95 120 V/μs G = +2, CC = 7 pF 120 150 V/μs G = +5, CC = 2 pF 250 300 V/μs G = +10, CC = 0 pF 380 420 V/μs Settling Time to 0.01% VO = 1 V step, RL = 500 Ω 23 ns Overload Recovery (50%) ±2.5 V input step, G = +2 50 ns DISTORTION/NOISE PERFORMANCE f = 1 MHz HD2 VO = 2 V p-p −93 dBc HD3 VO = 2 V p-p −108 dBc f = 5 MHz HD2 VO = 2 V p-p −70 dBc HD3 VO = 2 V p-p −80 dBc Input Voltage Noise f = 50 kHz 2.1 2.6 nV/√Hz Input Current Noise f = 50 kHz 2.1 pA/√Hz Differential Gain Error NTSC, RL = 150 Ω 0.03 % Differential Phase Error NTSC, RL = 150 Ω 0.04 Degrees DC PERFORMANCE Input Offset Voltage 0.4 1.0 mV Input Offset Voltage Drift TMIN to TMAX 0.5 μV/°C Input Bias Current +Input or −input 7.5 10.5 μA Input Bias Current Drift 10 nA/°C Input Offset Current 0.1 0.5 ±μA Open-Loop Gain 82 86 dB INPUT CHARACTERISTICS Input Resistance 10 MΩ Common-Mode Input Capacitance 1 pF Input Common-Mode Voltage Range −4.1 to +4.6 V Common-Mode Rejection Ratio VCM = ±4 V −86 −98 dB OUTPUT CHARACTERISTICS Output Voltage Swing −3.5 to +3.2 −3.8 to +3.4 V Linear Output Current 60 mA Short-Circuit Current 75 mA Capacitive Load Drive for 30% Overshoot VO = 50 mV p-p/1 V p-p 15/120 pF DISABLE CHARACTERISTICS Off Isolation f = 10 MHz −40 dB Turn-On Time VO = 0 V to 2 V, 50% logic to 50% output 45 ns Turn-Off Time VO = 0 V to 2 V, 50% logic to 50% output 50 ns DISABLE Voltage—Off/On VDISABLE − VLOGIC REFERENCE 1.75/1.90 V Enabled Leakage Current LOGIC REFERENCE = 0.4 V 70 μA DISABLE = 4.0 V 2 μA Rev. F | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS USING THE DISABLE FEATURE THEORY OF OPERATION PCB LAYOUT CONSIDERATIONS DRIVING 16-BIT ADCs DIFFERENTIAL DRIVER USING THE AD8021 IN ACTIVE FILTERS DRIVING CAPACITIVE LOADS OUTLINE DIMENSIONS ORDERING GUIDE
VS = ±5 V, @ TA = 25°C, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 1. AD8021AR/AD8021ARM Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth G = +1, CC = 10 pF, VO = 0.05 V p-p 355 490 MHz G = +2, CC = 7 pF, VO = 0.05 V p-p 160 205 MHz G = +5, CC = 2 pF, VO = 0.05 V p-p 150 185 MHz G = +10, CC = 0 pF, VO = 0.05 V p-p 110 150 MHz Slew Rate, 1 V Step G = +1, CC = 10 pF 95 120 V/μs G = +2, CC = 7 pF 120 150 V/μs G = +5, CC = 2 pF 250 300 V/μs G = +10, CC = 0 pF 380 420 V/μs Settling Time to 0.01% VO = 1 V step, RL = 500 Ω 23 ns Overload Recovery (50%) ±2.5 V input step, G = +2 50 ns DISTORTION/NOISE PERFORMANCE f = 1 MHz HD2 VO = 2 V p-p −93 dBc HD3 VO = 2 V p-p −108 dBc f = 5 MHz HD2 VO = 2 V p-p −70 dBc HD3 VO = 2 V p-p −80 dBc Input Voltage Noise f = 50 kHz 2.1 2.6 nV/√Hz Input Current Noise f = 50 kHz 2.1 pA/√Hz Differential Gain Error NTSC, RL = 150 Ω 0.03 % Differential Phase Error NTSC, RL = 150 Ω 0.04 Degrees DC PERFORMANCE Input Offset Voltage 0.4 1.0 mV Input Offset Voltage Drift TMIN to TMAX 0.5 μV/°C Input Bias Current +Input or −input 7.5 10.5 μA Input Bias Current Drift 10 nA/°C Input Offset Current 0.1 0.5 ±μA Open-Loop Gain 82 86 dB INPUT CHARACTERISTICS Input Resistance 10 MΩ Common-Mode Input Capacitance 1 pF Input Common-Mode Voltage Range −4.1 to +4.6 V Common-Mode Rejection Ratio VCM = ±4 V −86 −98 dB OUTPUT CHARACTERISTICS Output Voltage Swing −3.5 to +3.2 −3.8 to +3.4 V Linear Output Current 60 mA Short-Circuit Current 75 mA Capacitive Load Drive for 30% Overshoot VO = 50 mV p-p/1 V p-p 15/120 pF DISABLE CHARACTERISTICS Off Isolation f = 10 MHz −40 dB Turn-On Time VO = 0 V to 2 V, 50% logic to 50% output 45 ns Turn-Off Time VO = 0 V to 2 V, 50% logic to 50% output 50 ns DISABLE Voltage—Off/On VDISABLE − VLOGIC REFERENCE 1.75/1.90 V Enabled Leakage Current LOGIC REFERENCE = 0.4 V 70 μA DISABLE = 4.0 V 2 μA Rev. F | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS USING THE DISABLE FEATURE THEORY OF OPERATION PCB LAYOUT CONSIDERATIONS DRIVING 16-BIT ADCs DIFFERENTIAL DRIVER USING THE AD8021 IN ACTIVE FILTERS DRIVING CAPACITIVE LOADS OUTLINE DIMENSIONS ORDERING GUIDE