Datasheet AD8016 (Analog Devices) - 5

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AD8016 Data Sheet
@ 25°C, VS = ±6 V, RL = 100 Ω, PWDN0, PWDN1 = (1, 1), TMIN = –40°C, TMAX = +85°C, unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE –3 dB Bandwidth G = +1, RF = 1.5 kΩ, VOUT = 0.2 V p-p 320 MHz G = +5, RF = 499 Ω, VOUT < 0.5 V p-p 70 71 MHz Bandwidth for 0.1 dB Flatness G = +5, RF = 499 Ω, VOUT = 0.2 V p-p 10 15 MHz Large Signal Bandwidth VOUT = 1 V rms 80 MHz Peaking VOUT = 0.2 V p-p < 50 MHz 0.7 1.0 dB Slew Rate VOUT = 4 V p-p, G = +2 300 V/μs Rise and Fall Time VOUT = 2 V p-p 2 ns Settling Time 0.1%, VOUT = 2 V p-p 39 ns Input Overdrive Recovery Time VOUT = 6.5 V p-p 350 ns NOISE/DISTORTION PERFORMANCE Distortion, Single-Ended G = +5, VOUT = 2 V p-p, RF = 499 Ω Second Harmonic fC = 1 MHz, RL = 100 Ω/25 Ω −73/61 −75/−63 dBc Third Harmonic fC = 1 MHz, RL = 100 Ω/25 Ω −80/−68 −82/−70 dBc Multitone Power Ratio1 26 kHz to 138 kHz, ZLINE = 100 Ω, PLINE = 13 dBm −68 dBc IMD 500 kHz, Δf = 110 kHz, RL = 100 Ω/25 Ω −87/−82 −88/−83 dBc IP3 500 kHz 42/39 42/39 dBm Voltage Noise (RTI) f = 10 kHz 4 5 nV/√Hz Input Current Noise f = 10 kHz 17 20 pA√Hz INPUT CHARACTERISTICS RTI Offset Voltage −3.0 0.2 +3.0 mV +Input Bias Current −25 10 +25 μA −Input Bias Current −30 10 +30 μA Input Resistance 400 kΩ Input Capacitance 2 pF Input Common-Mode Voltage Range −4 +4 V Common-Mode Rejection Ratio 60 66 dB OUTPUT CHARACTERISTICS Output Voltage Swing Single-Ended, RL = 100 Ω −5 +5 V Linear Output Current G = +5, RL = 5 Ω, f = 100 kHz, −60 dBc SFDR 300 420 mA Short-Circuit Current 830 mA Capacitive Load Drive RS = 10 Ω 50 pF POWER SUPPLY Quiescent Current PWDN1, PWDN0 = (1, 1) 8 9.7 mA/Amp PWDN1, PWDN0 = (1, 0) 6 6.9 mA/Amp PWDN1, PWDN0 = (0, 1) 4 5.0 mA/Amp PWDN1, PWDN0 = (0, 0) 3 4.1 mA/Amp Recovery Time To 95% of IQ 23 μs Shutdown Current 250 μA out of bias pin 1.0 2.0 mA/Amp Power Supply Rejection Ratio ΔVS = ±1 V 63 80 dB OPERATING TEMPERATURE RANGE −40 +85 °C 1See Figure 48, R20, R21 = 0 Ω, R1 = open.
LOGIC INPUTS (CMOS COMPATIBLE LOGIC)
PWDN0, PWDN1, VCC = ±12 V or ±6 V; ful temperature range.
Table 3. Parameter Min Typ Max Unit
Logic 1 Voltage 2.2 VCC V Logic 0 Voltage 0 0.8 V Rev. C | Page 4 of 20 Document Outline Features Pin Configurations General Description Revision History Specifications Logic Inputs (CMOS Compatible Logic) Absolute Maximum Ratings Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuts Theory of Operation Power Supply and Decoupling Feedback Resistor Selection Bias Pin and PWDN Features Thermal Shutdown Applications Information Multitone Power Ratio (MTPR) Generating DMT Power Dissipation Thermal Enhancements and PCB Layout Thermal Testing Air Flow Test Conditions DUT Power Thermal Resistance PCB Dimensions of a Differential Driver Circuit Experimental Results Outline Dimensions Ordering Guide